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843S2807DYLF

Description
TQFP-32, Tray
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size165KB,17 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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843S2807DYLF Overview

TQFP-32, Tray

843S2807DYLF Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeTQFP
package instruction7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32
Contacts32
Manufacturer packaging codePRG32
Reach Compliance Codecompliant
ECCN codeEAR99
JESD-30 codeS-PQFP-G32
JESD-609 codee3
length7 mm
Humidity sensitivity level3
Number of terminals32
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency350 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)260
Master clock/crystal nominal frequency25 MHz
Maximum seat height1.6 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width7 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
FemtoClock™ Crystal-to-
LVPECL/LVDS/LVCMOS Clock Generator
ICS843S2807
DATA SHEET
G
ENERAL
D
ESCRIPTION
ICS843S2807 is a low phase noise Clock Generator
and is a member of the HiperClockS™ family of high
HiPerClockS™
performance clock solutions from IDT. The device
provides five banks of outputs and a reference clock.
The banks can be enabled by using a common output
enable pin. A 25MHz crystal is used to generate the 50MHz,
66.67MHz, 87.5MHz, 100MHz, 125MHz, 133MHz and 350MHz
frequencies.
F
EATURES
Five banks of outputs:
One single-ended LVCMOS reference clock output at: 25MHz
Bank A:
one single-ended (QA0) LVCMOS output at: 133MHz
and one (QA1/nQA1) LVPECL output at: 66.67MHz, 100MHz
and 125MHz
Bank B:
one (QB) LVCMOS output at: 50MHz
Bank C:
one (QC/nQC) differential LVPECL output at: 87.5MHz
Bank D:
one (QD/nQD) differential LVDS output at: 350MHz
Crystal input frequency: 25MHz
±5% frequency margining
V
CCO
_
LVCMOS
IC
S
P
IN
A
SSIGNMENT
V
CCO
_
LVCMOS
V
CCO
_
LVCMOS
REF_OUT
QA0
V
EE
V
EE
QB
Full 3.3V operating supply
0°C to 70°C ambient operating temperature
(refer to Table 7 on page 11)
Available in lead-free (RoHS 6) package
24
V
CC
QA1
nQA1
V
CCA
1
V
EE
QC
nQC
V
CC
LVCMOS - 133MHz
32 31 30 29 28 27 26 25
F_SEL0
F_SEL1
V
CC
XTAL_IN
XTAL_OUT
V
EE
V
CCA
2
RESET
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
MARGIN
MARGIN_MODE
PLL_BYPASS
nQD
V
CC
OE
V
EE
QD
ICS843S2807
32-Lead LQFP
7mm x 7mm x 1.4mm
package body
Y Package
Top View
23
22
21
20
19
18
17
B
LOCK
D
IAGRAM
LVCMOS - 25MHz
REF_OUT
÷5.2631
F_SEL[1:0]
Pullup
PLL_BYPASS
Pulldown
2
QA0
1
25MHz
LVPECL - 66.67/100/
125MHz
XTAL_IN
OSC
XTAL_OUT
Phase
Detector
VCO
700MHz
0
÷5.6,
÷7,
÷10.5
QA1
nQA1
LVCMOS - 50MHz
÷28
±5%
Frequency
Margining
÷14
QB
LVPECL - 87.5MHz
QC
÷8
nQC
LVDS - 350MHz
QD
MARGIN
Pulldown
MARGIN_MODE
Pulldown
RESET
Pulldown
OE
Pullup
÷2
nQD
ICS843S2807DY REVISION A JULY 20, 2009
1
©2009
Integrated Device Technology, Inc.

843S2807DYLF Related Products

843S2807DYLF 843S2807DYLFT
Description TQFP-32, Tray TQFP-32, Reel
Brand Name Integrated Device Technology Integrated Device Technology
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TQFP TQFP
package instruction 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32
Contacts 32 32
Manufacturer packaging code PRG32 PRG32
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
JESD-30 code S-PQFP-G32 S-PQFP-G32
JESD-609 code e3 e3
length 7 mm 7 mm
Humidity sensitivity level 3 3
Number of terminals 32 32
Maximum operating temperature 70 °C 70 °C
Maximum output clock frequency 350 MHz 350 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP
Package shape SQUARE SQUARE
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius) 260 260
Master clock/crystal nominal frequency 25 MHz 25 MHz
Maximum seat height 1.6 mm 1.6 mm
Maximum supply voltage 3.465 V 3.465 V
Minimum supply voltage 3.135 V 3.135 V
Nominal supply voltage 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface MATTE TIN MATTE TIN
Terminal form GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 7 mm 7 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
Base Number Matches 1 1
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