54ACT16648WD datasheet, PDF - EEWORLD Datasheet

54ACT16648WD: DescriptionACT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP56, FINE PITCH, CERAMIC, FP-56; Categorylogic logic; File Size175KB，10 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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54ACT16648WD Overview

ACT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP56, FINE PITCH, CERAMIC, FP-56

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	DFP
package instruction	DFP, FL56,.4,25
Contacts	56
Reach Compliance Code	not_compliant
ECCN code	3A001.A.2.C
Other features	DIRECTION CONTROL; SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED OR REAL TIME DATA
Control type	INDEPENDENT CONTROL
Counting direction	BIDIRECTIONAL
series	ACT
JESD-30 code	R-GDFP-F56
length	18.288 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER
MaximumI(ol)	0.024 A
Number of digits	8
Number of functions	2
Number of ports	2
Number of terminals	56
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	INVERTED
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DFP
Encapsulate equivalent code	FL56,.4,25
Package shape	RECTANGULAR
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Prop。Delay @ Nom-Sup	11.2 ns
propagation delay (tpd)	12.7 ns
Certification status	Not Qualified
Maximum seat height	3.05 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	0.635 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
translate	N/A
Trigger type	POSITIVE EDGE
width	9.652 mm
Base Number Matches	1

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