BU-63705D1-540Q datasheet, PDF

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BU-63705D1-540Q: DescriptionMil-Std-1553 Controller, 0.125MBps, CMOS, CQIP78, QIP-78; File Size257KB，4 Pages; ManufacturerData Device Corporation

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BU-63705D1-540Q Overview

Mil-Std-1553 Controller, 0.125MBps, CMOS, CQIP78, QIP-78

BU-63705D1-540Q Parametric

Parameter Name	Attribute value
Objectid	2008561585
package instruction	ZIP,
Reach Compliance Code	compliant
Country Of Origin	Taiwan, USA
YTEOL	6
Address bus width
boundary scan	NO
maximum clock frequency	16 MHz
letter of agreement	MIL-STD-1553
Data encoding/decoding methods	BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.125 MBps
External data bus width
JESD-30 code	R-CQIP-T78
length	53.34 mm
low power mode	YES
Number of serial I/Os	2
Number of terminals	78
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	ZIP
Package shape	RECTANGULAR
Package form	IN-LINE
Filter level	MIL-PRF-38534
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	1.27 mm
Terminal location	QUAD
width	45.72 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553

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www.ddc-web.com

MIL-STD-1553 Terminals for

Space Applications:

MODEL:BU-63825(925) and BU-63705

FEATURES:

BU-63705:

•

Drop-in Replacement for BU-61582 (83)

•

Drop-in Replacement for BU-65142

•

Rad Tolerant & Rad Hard Versions*

•

Rad Tolerant & Rad Hard Versions*

•

Fully Integrated Remote Terminal

•

Fully Integrated 1553 - BC/RT/MT

Including:

•

Flexible Processor Interface

- Low-Power Transceivers

•

16K x 16 Internal RAM

- Complete RT Protocol

•

Intelligent RT Data Buffering

•

Direct Interface to Processorless

•

Multiple Ordering Options;

Systems

+5V (Only), +5V/-15V, +5V/-12V

•

High Reliability Screening

+5V/Transceiverless (Contact Factory for

•

Multiple Ordering Options;

Availability)

+5V (Only), +5V/-15V, and +5V/-12V

+5V (Only, with Transmit Inhibits)

BU-63825(925):

DESCRIPTION

The BU-63825/925 BC/RT/MT Sp’ACE-II and BU-63705 Space-RT-II series of MIL-STD-1553 terminals continues Data

Device Corporation’s (DDC’s) commitment to producing hybrids with enhanced processing and screening for space

borne, radiation and Hi-Rel applications. Both terminals are designed specifically to be hardware and software

compatible, direct drop-in replacements for the equivalent Sp’ACE and Space RT series.

The BU-63825/925 Sp’ACE-II is a complete integrated interface between a 1553 bus and a host processor, and

replaces the BU-61582/83 Sp’ACE ( Space Advanced Communication Engine) pin-for-pin with the same 1.9 square

inch package.

The BU-63705 Space RT-II is a terminal for simple, non-CPU based applications, and shares the same 3.78 square inch

package as BU-65142 Space RT, which it replaces.

APPLICATIONS

The new generation of Sp’ACE-II and Space-RT-II terminals are designed for applications requiring the highest levels

of reliability and radiation tolerance*, including such platforms as launch vehicles, satellites and the International

Space Station.

DESIGN

The manufacturing of hybrids for space applications involves enhancements in the area of layout design, processing

and screening. The principle goal of the hybrid mechanical design is to improve the ease of wire bonding and

inspection. All of DDC's space grade terminals utilize ceramic packaging. Ceramic packages eliminate the potential

hermeticity problems associated with the glass beads of KOVAR (metal) packages. In addition, ceramic packages

facilitate improved thermal properties and feature reduced weight and lower cost.

*Contact Factory For Radiation Reports and Test Conditions

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