Datasheet
R8C/L35M Group, R8C/L36M Group, R8C/L38M Group, R8C/L3AM Group
RENESAS MCU
R01DS0028EJ0100
Rev.1.00
Jun 28, 2011
1.
1.1
Overview
Features
The R8C/L35M Group, R8C/L36M Group, R8C/L38M Group, and R8C/L3AM Group of single-chip MCUs
incorporate the R8C CPU core, which implements a powerful instruction set for a high level of efficiency and
supports a 1 Mbyte address space, allowing execution of instructions at high speed. In addition, the CPU core
integrates a multiplier for high-speed operation processing.
Power consumption is low, and the supported operating modes allow additional power control. These MCUs are
designed to maximize EMI/EMS performance.
Integration of many peripheral functions, including multifunction timer and serial interface, helps reduce the
number of system components.
These groups have data flash (1 KB × 4 blocks) with the background operation (BGO) function.
1.1.1
Applications
Household appliances, office equipment, audio equipment, consumer products, etc.
R01DS0028EJ0100 Rev.1.00
Jun 28, 2011
Page 1 of 72
R8C/L35M Group, R8C/L36M Group, R8C/L38M Group, R8C/L3AM Group
1. Overview
1.1.2
Differences between Groups
Table 1.1 lists the Differences between Groups, Table 1.2 lists the Programmable I/O Ports Provided for Each
Group, and Table 1.3 lists the LCD Display Function Pins Provided for Each Group. Figures 1.9 to 1.13 show
the Pin Assignment for Each Group, and Tables 1.7 to 1.10 list Product Information.
The explanations in the chapters which follow apply to the R8C/L3AM Group only. Note the differences shown
below.
Table 1.1
Item
I/O Ports
Interrupts
Timer RA
Timer RB
Timer RD
Timer RE
Timer RG
A/D Converter
LCD Drive
Control Circuit
Differences between Groups
Function
Programmable I/O ports
High current drive ports
INT interrupt pins
Key input interrupt pins
Timer RA output pin
Timer RB output pin
Timer RD I/O pin
Timer RE output pin
Timer RG I/O pin
Timer RG output pin
Analog input pin
LCD power supply
Common output pins
Segment output pins
R8C/L35M Group
41 pins
5 pins
5 pins
4 pins
None
None
None
None
None
None
12 pins
3 pins
(VL1, VL2, VL4)
Max. 4 pins
Max. 24 pins
52-pin LQFP
R8C/L36M Group
52 pins
8 pins
8 pins
4 pins
1 pin
1 pin
None
1 pin
None
None
12 pins
4 pins
(VL1 to VL4)
Max. 8 pins
Max. 32 pins
64-pin LQFP
R8C/L38M Group
68 pins
8 pins
8 pins
8 pins
1 pin
1 pin
8 pins
1 pin
None
None
16 pins
4 pins
(VL1 to VL4)
Max. 8 pins
Max. 48 pins
80-pin LQFP
R8C/L3AM Group
88 pins
16 pins
8 pins
8 pins
1 pin
1 pin
8 pins
1 pin
2 pins
2 pins
20 pins
4 pins
(VL1 to VL4)
Max. 8 pins
Max. 56 pins
100-pin LQFP/
100-pin QFP
Packages
Note:
1. I/O ports are shared with I/O functions, such as interrupts or timers.
Refer to
Tables 1.11 to 1.13, Pin Name Information by Pin Number,
for details.
R01DS0028EJ0100 Rev.1.00
Jun 28, 2011
Page 2 of 72
R8C/L35M Group, R8C/L36M Group, R8C/L38M Group, R8C/L3AM Group
1. Overview
Table 1.2
Programmable
I/O Port
P0
P1
P2
P3
P4
P5
P6
P7
P10
P11
P12
P13
Programmable I/O Ports Provided for Each Group
R8C/L35M Group
Total: 41 I/O pins
bit
7
!
−
!
−
!
−
−
!
−
−
−
−
bit
6
!
−
!
−
!
−
−
!
−
−
−
−
bit
5
!
−
!
−
!
−
−
!
−
−
−
−
bit
4
!
−
!
−
!
−
−
!
−
!
−
−
bit
3
!
−
−
!
!
−
−
−
−
!
!
!
bit
2
!
−
−
!
!
−
−
−
−
!
!
!
bit
1
!
−
−
!
!
−
−
−
−
!
!
!
bit
0
!
−
−
!
!
−
−
−
−
!
!
!
bit
7
!
−
!
!
!
−
−
!
−
!
−
−
R8C/L36M Group
Total: 52 I/O pins
bit
6
!
−
!
!
!
−
−
!
−
!
−
−
bit
5
!
−
!
!
!
−
−
!
−
!
−
−
bit
4
!
−
!
!
!
−
−
!
−
!
−
−
bit
3
!
−
−
!
!
−
−
!
−
!
!
!
bit
2
!
−
−
!
!
−
−
!
−
!
!
!
bit
1
!
−
−
!
!
−
−
!
−
!
!
!
bit
0
!
−
−
!
!
−
−
!
−
!
!
!
bit
7
!
−
!
!
!
−
!
!
−
!
−
−
R8C/L38M Group
Total: 68 I/O pins
bit
6
!
−
!
!
!
−
!
!
−
!
−
−
bit
5
!
−
!
!
!
−
!
!
−
!
−
−
bit
4
!
−
!
!
!
−
!
!
−
!
−
−
bit
3
!
!
!
!
!
−
!
!
−
!
!
!
bit
2
!
!
!
!
!
−
!
!
−
!
!
!
bit
1
!
!
!
!
!
−
!
!
−
!
!
!
bit
0
!
!
!
!
!
−
!
!
−
!
!
!
bit
7
!
!
!
!
!
−
!
!
!
!
−
!
R8C/L3AM Group
Total: 88 I/O pins
bit
6
!
!
!
!
!
−
!
!
!
!
−
!
bit
5
!
!
!
!
!
−
!
!
!
!
−
!
bit
4
!
!
!
!
!
−
!
!
!
!
−
!
bit
3
!
!
!
!
!
!
!
!
!
!
!
!
bit
2
!
!
!
!
!
!
!
!
!
!
!
!
bit
1
!
!
!
!
!
!
!
!
!
!
!
!
bit
0
!
!
!
!
!
!
!
!
!
!
!
!
Notes:
1. The symbol “!” indicates a programmable I/O port.
2. The symbol “-” indicates the settings should be made as follows:
- Set 1 to the corresponding bits in the PDi (i = 1 to 3, 5 to 7 and 10 to 13) register.
- Set 0 to the corresponding bits in the Pi (i = 1 to 3, 5 to 7 and 10 to 13) register.
- Set 0 to the corresponding bits in the P10DRR or P11DRR register.
Table 1.3
Shared
I/O Port
P0
P1
P2
P3
P4
P5
P6
P7
P12
−
−
−
−
LCD Display Function Pins Provided for Each Group
L35M Group
Common output: Max. 4
Segment output: Max. 24
L36M Group
Common output: Max. 8
Segment output: Max. 32
L38M Group
Common output: Max. 8
Segment output: Max. 48
L3AM Group
Common output: Max. 8
Segment output: Max. 56
SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG
11
10
9
8
15
14
13
12
11
10
9
8
SEG SEG SEG SEG
23
22
21
20
−
−
−
−
SEG SEG SEG SEG
23
22
21
20
SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG
23
22
21
20
19
18
17
16
23
22
21
20
19
18
17
16
SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG
27
26
25
24
31
30
29
28
27
26
25
24
31
30
29
28
27
26
25
24
31
30
29
28
27
26
25
24
SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG
39
38
37
36
35
34
33
32
39
38
37
36
35
34
33
32
39
38
37
36
35
34
33
32
39
38
37
36
35
34
33
32
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
SEG SEG SEG SEG
43
42
41
40
SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG SEG
51
50
49
48
47
46
45
44
51
50
49
48
47
46
45
44
COM COM COM COM
0
1
2
3
−
−
−
−
COM COM COM COM SEG SEG SEG SEG COM COM COM COM SEG SEG SEG SEG COM COM COM COM SEG SEG SEG SEG
0
1
2
3
55
54
53
52
0
1
2
3
55
54
53
52
0
1
2
3
55
54
53
52
−
−
−
−
CL2 CL1
−
−
−
−
−
−
CL2 CL1
−
−
−
−
−
−
CL2 CL1
−
−
CL2 CL1
VL1
VL2
−
VL4
VL1
VL2
VL3
VL4
VL1
VL2
VL3
VL4
VL1
VL2
VL3
VL4
Notes:
1. The symbol “−” indicates there is no LCD display function. Set the corresponding bits in registers LSE1 to LSE3, LSE5 to
LSE7 to 0 for these pins.
2. SEG52 to SEG55 can be used as COM7 to COM4.
The R8C/L35M Group does not have pins SEG52 to SEG55, so 1/8 duty cannot be selected.
3. The R8C/L35M Group does not have the VL3 pin, so 1/4 bias cannot be selected. When the internal voltage multiplier is
used, 1/2 bias cannot also be selected.
R01DS0028EJ0100 Rev.1.00
Jun 28, 2011
Page 3 of 72
R8C/L35M Group, R8C/L36M Group, R8C/L38M Group, R8C/L3AM Group
1. Overview
1.1.3
Specifications
Tables 1.4 to 1.6 list the Specifications.
Table 1.4
Item
CPU
Specifications (1)
Function
Central processing unit
Specification
R8C CPU core
• Number of fundamental instructions: 89
• Minimum instruction execution time:
50 ns (f(XIN) = 20 MHz, VCC = 2.7 to 5.5 V)
200 ns (f(XIN) = 5 MHz, VCC = 1.8 to 5.5 V)
• Multiplier: 16 bits × 16 bits
→
32 bits
• Multiply-accumulate instruction: 16 bits × 16 bits + 32 bits
→
32 bits
• Operating mode: Single-chip mode (address space: 1 Mbyte)
Refer to
Tables 1.7 to 1.10 Product Lists.
• Power-on reset
• Voltage detection 3 (detection level of voltage detection 0 and voltage
detection 1 selectable)
• CMOS I/O ports: 41, selectable pull-up resistor
• High current drive ports: 5
• CMOS I/O ports: 52, selectable pull-up resistor
• High current drive ports: 8
• CMOS I/O ports: 68, selectable pull-up resistor
• High current drive ports: 8
• CMOS I/O ports: 88, selectable pull-up resistor
• High current drive ports: 16
4 circuits: XIN clock oscillation circuit
XCIN clock oscillation circuit (32 kHz)
High-speed on-chip oscillator (with frequency adjustment function)
Low-speed on-chip oscillator
• Oscillation stop detection:
XIN clock oscillation stop detection function
• Frequency divider circuit:
Division ratio selectable from 1, 2, 4, 8, and 16
• Low-power-consumption modes:
Standard operating mode (high-speed clock, low-speed clock, high-
speed on-chip oscillator, low-speed on-chip oscillator), wait mode,
stop mode, power-off mode
Real-time clock (timer RE)
• Number of interrupt vectors: 69
• External Interrupt: 9 (INT × 5, key input × 4)
• Priority levels: 7 levels
• Number of interrupt vectors: 69
• External Interrupt: 12 (INT × 8, key input × 4)
• Priority levels: 7 levels
• Number of interrupt vectors: 69
• External Interrupt: 16 (INT × 8, key input × 8)
• Priority levels: 7 levels
• Number of interrupt vectors: 69
• External Interrupt: 16 (INT × 8, key input × 8)
• Priority levels: 7 levels
• 14 bits × 1 (with prescaler)
• Selectable reset start function
• Selectable low-speed on-chip oscillator for watchdog timer
• 1 channel
• Activation sources: 38
• Transfer modes: 2 (normal mode, repeat mode)
Memory
Power
Supply
Voltage
Detection
I/O Ports Programmable R8C/L35M Group
I/O ports
R8C/L36M Group
R8C/L38M Group
R8C/L3AM Group
Clock
Clock generation circuits
ROM/RAM
Data flash
Voltage detection circuit
Interrupts
R8C/L35M Group
R8C/L36M Group
R8C/L38M Group
R8C/L3AM Group
Watchdog Timer
DTC (Data Transfer Controller)
R01DS0028EJ0100 Rev.1.00
Jun 28, 2011
Page 4 of 72
R8C/L35M Group, R8C/L36M Group, R8C/L38M Group, R8C/L3AM Group
1. Overview
Table 1.5
Item
Timer
Specifications (2)
Function
Timer RA
Specification
8 bits × 1 (with 8-bit prescaler)
Timer mode (period timer), pulse output mode (output level inverted every
period), event counter mode, pulse width measurement mode,
pulse period measurement mode
8 bits × 1 (with 8-bit prescaler)
Timer mode (period timer), programmable waveform generation mode (PWM
output), programmable one-shot generation mode, programmable wait one-
shot generation mode
16 bits × 1 (with 4 capture/compare registers)
Timer mode (input capture function, output compare function), PWM mode
(output: 3 pins), PWM2 mode (PWM output: 1 pin)
16 bits × 2 (with 4 capture/compare registers)
Timer mode (input capture function, output compare function), PWM mode
(output: 6 pins), reset synchronous PWM mode (three-phase waveform output:
6 pins, sawtooth wave modulation), complementary PWM mode (three-phase
waveform output: 6 pins, triangular wave modulation), PWM3 mode (PWM
output with fixed period: 2 pins)
8 bits × 1
Real-time clock mode (counting of seconds, minutes, hours, days of week),
output compare mode
16 bits × 1
Phase-counting mode,
timer mode (output compare function, input capture function),
PWM mode (output: 1 pin)
Clock synchronous serial I/O/UART × 2 channels
Clock synchronous serial I/O/UART, I
2
C mode (I
2
C-bus),
multiprocessor communication function
1 (shared with I
2
C-bus)
1 (shared with SSU)
Hardware LIN: 1 channel (timer RA, UART0 used)
10-bit resolution × 12 channels, including sample and hold function, with sweep
mode
10-bit resolution × 12 channels, including sample and hold function, with sweep
mode
10-bit resolution × 16 channels, including sample and hold function, with sweep
mode
10-bit resolution × 20 channels, including sample and hold function, with sweep
mode
8-bit resolution × 2 circuits
• 2 circuits (sheared with voltage monitor 1 and voltage monitor 2)
• External reference voltage input available
2 circuits
Common output: Max. 4 pins
Bias: 1/2, 1/3
Segment output: Max. 24 pins
Duty: static, 1/2, 1/3, 1/4
Common output: Max. 8 pins
Segment output: Max. 32 pins
(1)
Common output: Max. 8 pins
Bias: 1/2, 1/3, 1/4
(1)
Duty: static, 1/2, 1/3, 1/4, 1/8
Segment output: Max. 48 pins
Common output: Max. 8 pins
Segment output: Max. 56 pins
(1)
Voltage multiplier and dedicated regulator integrated
Timer RB
Timer RC
Timer RD
Timer RE
Timer RG
Serial
Interface
UART0, UART1
UART2
Synchronous Serial
Communication Unit (SSU)
I
2
C bus
LIN Module
A/D
R8C/L35M Group
Converter
R8C/L36M Group
R8C/L38M Group
R8C/L3AM Group
D/A Converter
Comparator A
Comparator B
R8C/L35M Group
LCD Drive
Control
R8C/L36M Group
Circuit
R8C/L38M Group
R8C/L3AM Group
Note:
1. This applies when four pins are selected for common output.
R01DS0028EJ0100 Rev.1.00
Jun 28, 2011
Page 5 of 72
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