80524RX333128 datasheet, PDF - EEWORLD Datasheet

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80524RX333128: DescriptionMicroprocessor, 32-Bit, CMOS, PPGA370, 1.950 X 1.950 INCH, STAGGERED, PLASTIC, PGA-370; CategoryThe embedded processor and controller Microcontrollers and processors; File Size951KB，86 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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80524RX333128 Overview

Microprocessor, 32-Bit, CMOS, PPGA370, 1.950 X 1.950 INCH, STAGGERED, PLASTIC, PGA-370

80524RX333128 Parametric

Parameter Name	Attribute value
Maker	Intel
Parts packaging code	PGA
package instruction	IPGA,
Contacts	370
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Address bus width	32
bit size	32
boundary scan	YES
maximum clock frequency	333 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-PPGA-P370
length	49.53 mm
low power mode	YES
Number of terminals	370
Package body material	PLASTIC/EPOXY
encapsulated code	IPGA
Package shape	SQUARE
Package form	GRID ARRAY, INTERSTITIAL PITCH
Certification status	Not Qualified
Maximum seat height	3.33 mm
Minimum supply voltage	2 V
Nominal supply voltage	2 V
surface mount	NO
technology	CMOS
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
width	49.53 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR
Base Number Matches	1

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Intel

Celeron™ Processor

Datasheet

Product Features

Available at 500 MHz, 466 MHz,

433 MHz, 400 MHz, 366 MHz, 333 MHz,

and 300A MHz core frequencies with

128 KB level-two cache; 300 MHz and

266 MHz core frequencies without

level-two cache.

Binary compatible with applications

running on previous members of the Intel

microprocessor line.

Dynamic execution microarchitecture.

Operates on a 66 MHz, transaction-oriented

system bus.

Specifically designed for valued PC

systems: based on the same P6

microarchitecture used in the Pentium

processor with the capabilities of MMX™

technology.

Power Management capabilities.

Optimized for 32-bit applications running

on advanced 32-bit operating systems.

Uses cost-effective packaging technology.

— Single Edge Processor (S.E.P.) Package

to maintain compatibility with SC242

(processor core frequencies (MHz):

266, 300, 300A, 333, 366, 400, 433).

— Plastic Pin Grid Array (PPGA) Package

(processor core frequencies (MHz):

300A, 333, 366, 400, 433, 466, 500).

Integrated high performance 32 KB

instruction and data, nonblocking, level-

one cache: separate 16 KB instruction and

16 KB data caches.

Integrated thermal diode.

The Intel

Celeron™ processor is designed for Value PC desktops and is binary compatible with

previous generation Intel architecture processors. The Intel

Celeron processor provides good

performance for applications running on advanced operating systems such as

Windows* 95/98, Windows* NT, and UNIX*. This is achieved by integrating the best attributes

of Intel processors—the dynamic execution performance of the P6 microarchitecture plus the

capabilities of MMX™ technology—bringing a balanced level of performance to the Value PC

market segment. The Intel

Celeron processor offers the dependability you would expect from

Intel at an exceptional value. Systems based on Intel

Celeron processors also include the latest

features to simplify system management and lower the cost of ownership for small business and

home environments.

PPGA Package

S.E.P. Package

Order Number:

243658-009

July 1999

Intel

Celeron™ Processor

Contents

1.0

Introduction......................................................................................................................... 9

1.1

1.2

2.0

2.1

2.2

Terminology .......................................................................................................... 9

1.1.1 Package Terminology.............................................................................10

References ..........................................................................................................10

The Intel

Celeron™ Processor System Bus and V

REF

......................................12

Clock Control and Low Power States..................................................................12

2.2.1 Normal State—State 1 ...........................................................................12

2.2.2 AutoHALT Power Down State—State 2 .................................................13

2.2.3 Stop-Grant State—State 3 .....................................................................13

2.2.4 HALT/Grant Snoop State—State 4 ........................................................14

2.2.5 Sleep State—State 5..............................................................................14

2.2.6 Deep Sleep State—State 6 ....................................................................15

2.2.7 Clock Control..........................................................................................15

Intel

Celeron™ Processor Power and Ground Pins ..........................................15

Intel

Celeron™ Processor Decoupling ..............................................................16

2.4.1 Intel

Celeron™ Processor System Bus AGTL+ Decoupling.................16

Voltage Identification ...........................................................................................16

Intel

Celeron™ Processor System Bus Unused Pins........................................17

Intel

Celeron™ Processor System Bus Signal Groups .....................................18

2.7.1 Asynchronous Vs. Synchronous for System Bus Signals ......................19

2.7.2 System Bus Frequency Select Signal (BSEL)........................................19

Test Access Port (TAP) Connection....................................................................19

Maximum Ratings................................................................................................20

Processor DC Specifications...............................................................................20

AGTL+ System Bus Specifications .....................................................................23

Intel

Celeron™ Processor System Bus AC Specifications................................24

Intel

Celeron™ Processor System Bus Clock (BCLK) Signal Quality

Specifications and Measurement Guidelines ......................................................36

AGTL+ Signal Quality Specifications and Measurement Guidelines ..................38

Non-AGTL+ Signal Quality Specifications and Measurement Guidelines...........40

3.3.1 Overshoot/Undershoot Guidelines .........................................................40

3.3.2 Ringback Specification ...........................................................................41

3.3.3 Settling Limit Guideline...........................................................................41

Thermal Specifications ........................................................................................42

4.1.1 Thermal Diode........................................................................................43

Thermal Parameters............................................................................................43

4.2.1 Ambient Temperature.............................................................................43

4.2.2 Thermal Resistance ...............................................................................43

4.2.3 Thermal Solution Performance...............................................................44

Thermal Solution Attach Methods .......................................................................44

Electrical Specifications....................................................................................................12

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

2.12

3.0

3.1

3.2

3.3

System Bus Signal Simulations........................................................................................36

4.0

Thermal Specifications and Design Considerations.........................................................42

4.1

4.2

4.3

Datasheet

Intel

Celeron™ Processor

5.0

Mechanical Specifications................................................................................................ 45

5.1

S.E.P. Package ................................................................................................... 45

5.1.1 Materials Information.............................................................................. 45

5.1.2

Signal Listing ......................................................................................... 46

PPGA Package ................................................................................................... 55

5.2.1 Materials Information.............................................................................. 55

5.2.2 Signal Listing.......................................................................................... 57

Heat Sink Volumetric Keepout Zone Guidelines ................................................. 68

S.E.P. Package ................................................................................................... 68

6.1.1 Introduction ............................................................................................ 68

6.1.2 Mechanical Specifications ...................................................................... 69

6.1.2.1 Boxed Processor Heat Sink Dimensions................................... 70

6.1.2.2 Boxed Processor Heat Sink Weight .......................................... 71

6.1.2.3 Boxed Processor Retention Mechanism ................................... 71

6.1.3 Boxed Processor Requirements............................................................. 71

6.1.4 Thermal Specifications ........................................................................... 72

6.1.4.1 Boxed Processor Cooling Requirements .................................. 72

PPGA Package ................................................................................................... 73

6.2.1 Introduction ............................................................................................ 73

6.2.2 Mechanical Specifications ...................................................................... 73

6.2.2.1 Boxed Processor Heat Sink Dimensions................................... 75

6.2.2.2 Boxed Processor Heat Sink Weight .......................................... 75

6.2.2.3 Boxed Processor Thermal Cooling Solution Clip ...................... 76

6.2.3 Boxed Processor Requirements............................................................. 76

6.2.4 Thermal Specifications ........................................................................... 78

6.2.4.1 Boxed Processor Cooling Requirements .................................. 78

Signal Summaries ............................................................................................... 85

5.2

5.3

6.0

6.1

Boxed Processor Specifications....................................................................................... 68

6.2

7.0

Intel

Celeron™ Processor Signal Description ................................................................ 79

7.1

Datasheet

Intel

Celeron™ Processor

Figures

Clock Control State Machine...............................................................................13

BCLK to Core Logic Offset ..................................................................................33

BCLK*, PICCLK, and TCK Generic Clock Waveform .........................................33

Intel

Celeron™ Processor System Bus Valid Delay Timings ............................34

Intel

Celeron™ Processor System Bus Setup and Hold Timings......................34

Intel

Celeron™ Processor System Bus Reset and Configuration Timings........34

Power-On Reset and Configuration Timings.......................................................35

Test Timings (TAP Connection) ..........................................................................35

Test Reset Timings .............................................................................................35

BCLK, TCK, PICCLK Generic Clock Waveform at the Processor Core Pins .....37

BCLK, TCK, PICCLK Generic Clock Waveform at the Processor Edge

Fingers ................................................................................................................38

Low to High AGTL+ Receiver Ringback Tolerance.............................................39

Non-AGTL+ Overshoot/Undershoot, Settling Limit, and Ringback .....................40

Intel

Celeron™ Processor Substrate Dimensions (S.E.P. Package) ................46

Intel

Celeron™ Processor Substrate Primary/Secondary Side

Dimensions (S.E.P. Package) .............................................................................46

PPGA Package Dimensions................................................................................55

PPGA Package (Pin Side View)..........................................................................57

Boxed Intel

Celeron™ Processor in S.E.P. Package in the

Retention Mechanism..........................................................................................69

Side View Space Requirements for the Boxed Processor ..................................69

Front View Space Requirements for the Boxed Processor .................................70

Top View Airspace Requirements for the Boxed Processor ...............................70

Boxed Processor Fan Heat Sink Power Cable Connector Description ...............71

Motherboard Power Header Placement Relative to Fan Power

Connector and SC242.........................................................................................72

Boxed Intel

Celeron™ Processor in PPGA Package ........................................73

Side View Space Requirements for the Boxed Processor ..................................74

Top View Space Requirements for the Boxed Processor ...................................74

Side View Airspace Requirements for the Boxed Processor ..............................75

Boxed Processor Fan Heat Sink Power Cable Connector Description ...............76

Motherboard Power Header Placement Relative to the

Intel

Celeron™ Processor in the PPGA Package .............................................77

Top View of Motherboard Keepout Requirements ..............................................77

Side View of Motherboard Keepout Requirements .............................................78

Datasheet

80524RX333128 Related Products

	80524RX333128	80524RX466128	80524RX366128	80524RX500128	80524RX433128	80524RX400128	80524RX300A128
Description	Microprocessor, 32-Bit, CMOS, PPGA370, 1.950 X 1.950 INCH, STAGGERED, PLASTIC, PGA-370	Microprocessor, 32-Bit, 466MHz, CMOS, PPGA370, 1.950 X 1.950 INCH, STAGGERED, PLASTIC, PGA-370	Microprocessor, 32-Bit, 366MHz, CMOS, PPGA370, 1.950 X 1.950 INCH, STAGGERED, PLASTIC, PGA-370	Microprocessor, 32-Bit, 500MHz, CMOS, PPGA370, 1.950 X 1.950 INCH, STAGGERED, PLASTIC, PGA-370	Microprocessor, 32-Bit, 433MHz, CMOS, PPGA370, 1.950 X 1.950 INCH, STAGGERED, PLASTIC, PGA-370	Microprocessor, 32-Bit, 400MHz, CMOS, PPGA370, 1.950 X 1.950 INCH, STAGGERED, PLASTIC, PGA-370	Microprocessor, 32-Bit, 300MHz, CMOS, PPGA370, 1.950 X 1.950 INCH, STAGGERED, PLASTIC, PGA-370
Parts packaging code	PGA	PGA	PGA	PGA	PGA	PGA	PGA
package instruction	IPGA,	IPGA,	IPGA,	IPGA,	IPGA,	IPGA,	IPGA,
Contacts	370	370	370	370	370	370	370
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3
Address bus width	32	32	32	32	32	32	32
bit size	32	32	32	32	32	32	32
boundary scan	YES	YES	YES	YES	YES	YES	YES
maximum clock frequency	333 MHz	466 MHz	366 MHz	500 MHz	433 MHz	400 MHz	300 MHz
External data bus width	64	64	64	64	64	64	64
Format	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT
Integrated cache	YES	YES	YES	YES	YES	YES	YES
JESD-30 code	S-PPGA-P370	S-PPGA-P370	S-PPGA-P370	S-PPGA-P370	S-PPGA-P370	S-PPGA-P370	S-PPGA-P370
length	49.53 mm	49.53 mm	49.53 mm	49.53 mm	49.53 mm	49.53 mm	49.53 mm
low power mode	YES	YES	YES	YES	YES	YES	YES
Number of terminals	370	370	370	370	370	370	370
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	IPGA	IPGA	IPGA	IPGA	IPGA	IPGA	IPGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY, INTERSTITIAL PITCH	GRID ARRAY, INTERSTITIAL PITCH	GRID ARRAY, INTERSTITIAL PITCH	GRID ARRAY, INTERSTITIAL PITCH	GRID ARRAY, INTERSTITIAL PITCH	GRID ARRAY, INTERSTITIAL PITCH	GRID ARRAY, INTERSTITIAL PITCH
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	3.33 mm	3.33 mm	3.33 mm	3.33 mm	3.33 mm	3.33 mm	3.33 mm
Minimum supply voltage	2 V	2 V	2 V	2 V	2 V	2 V	2 V
Nominal supply voltage	2 V	2 V	2 V	2 V	2 V	2 V	2 V
surface mount	NO	NO	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR
width	49.53 mm	49.53 mm	49.53 mm	49.53 mm	49.53 mm	49.53 mm	49.53 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR	MICROPROCESSOR
Maker	Intel	Intel	-	Intel	Intel	Intel	Intel
Base Number Matches	1	1	1	1	-	-	-
speed	-	466 MHz	366 MHz	500 MHz	433 MHz	400 MHz	300 MHz

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