DFP
Vishay Dale
Thick Film Resistor Networks, Flat Pack
FEATURES
•
Isolated and bussed schematics available
•
0.065" (1.65 mm) height for high density packaging
•
Low temperature coefficient (- 55 °C to + 125 °C)
± 100 ppm/°C
•
Hot solder dipped leads
•
Highly stable thick film
•
Wide resistance range
•
All devices are capable of passing the MIL-STD-202,
method 210, condition C “Resistance to Soldering Heat”
test
STANDARD ELECTRICAL SPECIFICATIONS
GLOBAL
MODEL
DFP
POWER RATING
ELEMENT PACKAGE
P
25 °C
P
25 °C
W
W
0.25
0.15
0.65
0.65
CIRCUIT
SCHEMATIC
11
12
MAXIMUM
WORKING
VOLTAGE
(3)
V
DC
75
75
RESISTANCE
TEMPERATURE
(1)
TOLERANCE
(2)
RANGE
COEFFICIENT
±%
Ω
± ppm/°C
100
100
1, 2, 5
1, 2, 5
10 to 1M
10 to 1M
TCR TRACKING
± ppm/°C
50
50
Notes
• Consult factory for stocked values.
(1)
Temperature range: - 55 °C to + 125 °C.
(2)
± 2 % standard, ± 1 % and ± 5 % available.
(3)
Continuous working voltage shall be
P
x
R
or maximum working voltage, whichever is less.
TECHNICAL SPECIFICATIONS
11 Schematic
7 or 8 isolated resistors
The DFPxx11 provides the user with 7 or 8 nominally equal resistors with
each resistor isolated from all others. Commonly used in the following
applications:
• “Wired OR” pull-up
• Long-line impedance balancing
• Power driven pull-up
• LED current limiting
• Power gate pull-up
• ECL output pull-down
• Line termination
• TTL input pull-down
13 or 15 resistors with one pin common
The DFPxx12 provides the user with a choice of 13 or 15 nominally equal
resistors, each connected to a common pin (14 or 16). Commonly used in
the following applications:
• MOS/ROM pull-up/pull-down
• TTL input pull-down
• Open collector pull-up
• Digital pulse squaring
• “Wired OR” pull-up
• TTL unused gate pull-up
• Power driven pull-up
• High speed parallel pull-up
DFP1411
Pin #1
DFP1611
12 Schematic
• • • • • • • •
DFP1412
Pin #1
DFP1612
GLOBAL PART NUMBER INFORMATION
New Global Part Numbering: DFP14121K00GD05 (preferred part number information)
D
GLOBAL
MODEL
DFP
F
P
1
4
1
2
1
K
0
0
G
D
0
5
PIN COUNT
14
16
SCHEMATIC
11
= Isolated
12
= Bussed
RESISTANCE
VALUE
R
=
Ω
K
= kΩ
M
= MΩ
10R0
= 10
Ω
680K
= 680 kΩ
1M00
= 1.0 MΩ
102
TOLERANCE
CODE
F
=±1%
G
=±2%
J
=±5%
PACKAGING
E05
=
Lead (Pb)-free,
tube
D05
=
Tin/lead, tube
SPECIAL
Blank = Standard
(Dash number)
(Up to 3 digits)
From
1 to 999
as applicable
Historical Part Number Example: DFP1412102G (will continue to be accepted)
DFP
HISTORICAL MODEL
www.vishay.com
416
14
PIN COUNT
12
SCHEMATIC
G
TOLERANCE CODE
D05
PACKAGING
RESISTANCE VALUE
For technical questions, contact:
ff2aresistors@vishay.com
Document Number: 31513
Revision: 03-Mar-10
DFP
Thick Film Resistor Networks, Flat Pack
Vishay Dale
DIMENSIONS
in inches (millimeters)
Pin #1
0.250 (6.35)
Min.
0.050
(1.27)
Typ.
0.019 ± 0.006
(0.48 ± 0.15)
A
0.265 (6.73) Max.
0.365 (9.27) Min.
0.385 (9.78) Max.
0.065
(1.65)
Max.
0.825 (20.96)
Max.
0.250 (6.35)
Min.
0.005 + 0.004
- 0.002
(0.127 + 0.102
- 0.051)
GLOBAL MODEL
DFP14
DFP16
DIMENSION A
0.037 ± 0.010 (0.94 ± 0.25)
0.012 ± 0.010 (0.30 ± 0.25)
TECHNICAL SPECIFICATIONS
PARAMETER
Isolation resistance 11 schematic
Voltage coefficient of resistance
Maximum operating voltage
Operating temperature range
Storage temperature range
UNIT
MΩ
ppm/V
V
DC
°C
°C
DFP14/16
> 100
< 50 typical
75
- 55 to + 125
- 55 to + 150
MECHANICAL SPECIFICATIONS
Marking
Marking resistance
to solvents
Solderability
Terminals
Body
Model number, schematic number, value
tolerance, pin 1 indicator, date code
Permanency testing per
MIL-STD-202, method 215
Per MIL-STD-202, method 208E
Per MIL-STD-1276 DFPxx11, DFPxx12 =
type G (hot solder dipped). Hot solder
dipped leads supplied as standard finish.
Epoxy filled ceramic sandwich
11 Schematic
Power Rating (W)
Package
12 Schematic
Power Rating (W)
Package
0.65
0.65
0.50
0.50
Single Resistor
0.25
Single Resistor
0.15
- 55
+ 25
+ 70
+ 125 + 150
- 55
+ 25
+ 70
+ 125 + 150
Derating
Ambient Temperature °C
Derating
Ambient Temperature °C
PERFORMANCE
TEST
Power conditioning
Thermal shock
Short time overload
Low temperature operation
Moisture resistance
Resistance to soldering heat
Shock
Vibration
Load life
Terminal strength
Insulation resistance
Dielectric withstanding voltage
CONDITIONS
1.5 x rated power, applied 1.5 h “ON” and 0.5 h “OFF”
for 100 h ± 4 h at + 25 °C ambient temperature
5 cycles between - 65 °C and + 125 °C
2.5 x rated working voltage, 5 s
45 min at full rated working voltage at - 65 °C
240 h with humidity ranging from 80 % RH to 98 % RH
Leads immersed in + 260°
ΔC
solder to within 1/16" of body for 10 s
Total of 18 shocks at 100
g's
12 h at maximum of 20
g's
between 10 Hz and 2000 Hz
1000 h at + 70 °C, rated power applied 1.5 h “ON”, 0.5 h “OFF”
for full 1000 h period. Derated according to the curve.
1.5 pound pull for 30 s
10 000 MΩ (minimum)
No evidence of arcing or damage (200 V
RMS
for 1 min)
MAX.
ΔR
(TYPICAL TEST LOTS)
± 0.50 %
ΔR
± 0.50 %
ΔR
± 0.25 %
ΔR
± 0.25 %
ΔR
± 0.50 %
ΔR
± 0.25 %
ΔR
± 0.25 %
ΔR
± 0.25 %
ΔR
± 0.50 %
ΔR
± 0.25 %
ΔR
-
-
Document Number: 31513
Revision: 03-Mar-10
For technical questions, contact:
ff2aresistors@vishay.com
www.vishay.com
417
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www.vishay.com
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Revision: 02-Oct-12
1
Document Number: 91000