DSPIC33CH256MP206-H/MR datasheet, PDF

DSPIC33CH256MP206-H/MR: DescriptionDigital Signal Processor, 0-Ext Bit, 64MHz, CMOS, PQCC64; CategoryThe embedded processor and controller Microcontrollers and processors; File Size5MB，814 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com

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DSPIC33CH256MP206-H/MR Overview

Digital Signal Processor, 0-Ext Bit, 64MHz, CMOS, PQCC64

Parameter Name	Attribute value
Objectid	8364908493
package instruction	QFN-64
Reach Compliance Code	compliant
Country Of Origin	Thailand
ECCN code	3A991.A.2
YTEOL	8.3
Other features	16kbytes slave core Ram available
Address bus width
barrel shifter	YES
bit size	16
boundary scan	YES
maximum clock frequency	64 MHz
External data bus width
Format	FIXED POINT
Integrated cache	NO
Internal bus architecture	MULTIPLE
JESD-30 code	S-PQCC-N64
length	9 mm
low power mode	YES
Number of DMA channels	8
Number of external interrupt devices	3
Number of serial I/Os	2
Number of terminals	64
Number of timers	6
On-chip data RAM width	8
On-chip program ROM width	24
Maximum operating temperature	150 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC64,.35SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
RAM (number of words)	32768
ROM programmability	FLASH
Maximum seat height	1 mm
Maximum slew rate	98 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
width	9 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, CONTROLLER

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