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83115BRILFT

Description
IC clk buffer 1:16 200mhz 28qsop
Categorysemiconductor    Analog mixed-signal IC   
File Size625KB,11 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Environmental Compliance  
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83115BRILFT Overview

IC clk buffer 1:16 200mhz 28qsop

LOW SKEW, 1-TO-16 LVCMOS/LVTTL
FANOUT BUFFER
ICS83115I
Features
Sixteen LVCMOS / LVTTL outputs, 15
output impedance
One LVCMOS / LVTTL clock input
Maximum output frequency: 200MHz
All inputs are 5V tolerant
Output skew: 250ps (maximum)
Part-to-part skew: 800ps (maximum)
Additive phase jitter, RMS: 0.20ps (typical)
Full 3.3V operating supply
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
General Description
The ICS83115I is a low skew, 1-to-16 LVCMOS/
LVTTL Fanout Buffer and a member of the
HiPerClockS™
HiPerClockS™ family of High Performance Clock
Solutions from IDT. The ICS83115I single-ended
clock input accepts LVCMOS or LVTTL input levels.
The ICS83115I operates at full 3.3V supply mode over the
industrial temperature range. Guaranteed output and part-to-part
skew characteristics make the ICS83115I ideal for those clock
distribution applications demanding well defined performance and
repeatability.
ICS
Block Diagram
OE2
V
DD
Pin Assignment
OE1
Q0
Q1
Q2
V
DD
V
DD
Q3
Q4
GND
GND
Q5
Q6
Q7
IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OE2
Q15
Q14
Q13
V
DD
V
DD
Q12
Q11
GND
GND
Q10
Q9
Q8
OE0
OE2
OE2
OE0
4
IN
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
OE1
ICS83115I
28-Lead SSOP, 150mil
9.9mm x 3.9mm x 1.5mm package body
R Package
Top View
4
OE1
GND
OE0
IDT™ / ICS™
LVCMOS/LVTTL FANOUT BUFFER
1
ICS83115BRI REV. B MARCH 19, 2008

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