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KMPC8555EVTAPF

Description
IC mpu powerquicc iii 783-fcpbga
Categorysemiconductor    The embedded processor and controller   
File Size1MB,88 Pages
ManufacturerFREESCALE (NXP)
Environmental Compliance  
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IC mpu powerquicc iii 783-fcpbga

Freescale Semiconductor
Technical Data
MPC8555EEC
Rev. 4.2, 1/2008
MPC8555E PowerQUICC™ III
Integrated Communications Processor
Hardware Specification
The MPC8555E integrates a PowerPC™ processor core
built on Power Architecture™ technology with system logic
required for networking, telecommunications, and wireless
infrastructure applications. The MPC8555E is a member of
the PowerQUICC™ III family of devices that combine
system-level support for industry-standard interfaces with
processors that implement the embedded category of the
Power Architecture technology. For functional
characteristics of the processor, refer to the
MPC8555E
PowerQUICC™ III Integrated Communications Processor
Reference Manual.
To locate any published errata or updates for this document
refer to http://www.freescale.com or contact your Freescale
sales office.
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Contents
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 8
Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 13
Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . 16
DDR SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Ethernet: Three-Speed, MII Management . . . . . . . . . . 22
Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
CPM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . . . 56
Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
System Design Information . . . . . . . . . . . . . . . . . . . . . 78
Document Revision History . . . . . . . . . . . . . . . . . . . . 85
Device Nomenclature . . . . . . . . . . . . . . . . . . . . . . . . . 86
© Freescale Semiconductor, Inc., 2008. All rights reserved.
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