MC33593FTA datasheet, PDF - EEWORLD Datasheet

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MC33593FTA: DescriptionSPECIALTY CONSUMER CIRCUIT, PQFP24, PLASTIC, LQFP-24; CategoryOther integrated circuit (IC) Consumption circuit; File Size283KB，26 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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MC33593FTA Overview

SPECIALTY CONSUMER CIRCUIT, PQFP24, PLASTIC, LQFP-24

MC33593FTA Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	QFP
package instruction	LFQFP,
Contacts	24
Reach Compliance Code	unknown
ECCN code	EAR99
Commercial integrated circuit types	CONSUMER CIRCUIT
JESD-30 code	S-PQFP-G24
length	4 mm
Humidity sensitivity level	1
Number of functions	1
Number of terminals	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4 mm
Base Number Matches	1

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order this document

by MC33593/D

ROMEO2

MC33593

PLL Tuned UHF Receiver

for Data Transfer Applications

•

868MHz, 902-928MHz Bands

OOK and FSK Demodulation

Low Current Consumption: 7mA Typ. in Run Mode

Internal or External Strobing

Fast Wake-Up Time (1ms)

-105dBm RF Sensitivity (at 4.8kBd Data Rate)

Fully Integrated VCO

Image Cancelling Mixer

Integrated IF Bandpass Filter at 660kHz

IF Bandwidth: 500kHz

ID Byte and Tone Detection

Data Rate: 1 to 11kBd

Manchester Coded Data Clock Recovery

Fully Configurable by SPI Interface

Few External Components, no RF Adjustment

Pin Connections

RCBGAP

STROBE

GNDDIG

MIXOUT

CAFC

VCC

VCCLNA

RFIN

GNDLNA

GNDSUB

VCCDIG

SCLK

MOSI

MISO

RESETB

DMDAT

PFD

GNDVCO

GND

XTAL1

XTAL2

CAGC

Figure 1: Simplified block diagram

Table 1: Ordering Information

Device

MC33593FTA

RF frequency/

IF filter bandwidth

868MHz / 500kHz

Ambiant

Temperature Range

-40°C to +85°C

Package

LQFP24

This document contains information on a new product under development. Motorola

reserves the right to change or discontinue this product without notice.

REV 6.9

Non Disclosure Agreement Required

CMIXAGC

MC33593

RECEIVER FUNCTIONAL DESCRIPTION

The basic functionality of the ROMEO2 receiver may be seen by reference to the accompanying block

diagram (see figure 1). It is fully compatible with the Tango3 transmitter.

The RF section comprises a mixer with image cancelling, followed by an IF band-pass filter at 660kHz, an

AGC controlled gain stage and OOK and FSK demodulators, the desired modulation type being selectable by the

SPI interface. The data output from the circuit may either be the data comparator output, or, if Data Manager is

enabled, the SPI port.

The local oscillator is controlled with a PLL referenced to the crystal oscillator. The received channel is defined

by the choice of the crystal frequency.

An SPI bus permits programming the modulation type, data rate, UHF frequency, ID word etc., though to

accomodate applications where no bus interface is available the circuit defaults at power-on to a standard

operating mode.

Depending upon the configuration, the circuit can be either externally strobed by the STROBE input or

internally wait-and-sleep cycled to reduce the power consumption. At any time, a high level on STROBE

overrides the internal timer output and wakes up ROMEO2. When the circuit is switched into sleep mode its

current consumption is approximately 100µA. The circuit configuration which has previously been programmed is

retained.

THE LOCAL OSCILLATOR PLL

The PLL is tuned by comparing the local oscillator frequency, after suitable division, with that of the crystal

oscillator reference. The loop filter has been integrated in the IC. Practical limits upon the values of components

which may be integrated mean that the local oscillator performance may be slightly improved by using an

external PFD filter, shown in Figure 2. In this way the user may choose to have optimum performance with the

addition of external filter components. The PLL gain may be programmed by bit PG: it is recommended that this

bit be set to 1, corresponding to low loop gain.

Figure 2 : External loop filter

C1=4.7nF, C2=390pF, R=1kΩ

MOTOROLA SEMICONDUCTORS PRODUCTS

Non Disclosure Agreement Required

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