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DC851A-A

Description
board eval ltc2299iup
CategoryDevelopment board/suite/development tools   
File Size680KB,24 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Environmental Compliance  
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DC851A-A Overview

board eval ltc2299iup

LTC2299
Dual 14-Bit, 80Msps
Low Power 3V ADC
FEATURES
DESCRIPTIO
Integrated Dual 14-Bit ADCs
Sample Rate: 80Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 444mW
73dB SNR at 70MHz Input
90dB SFDR at 70MHz Input
110dB Channel Isolation at 100MHz
Multiplexed or Separate Data Bus
Flexible Input: 1V
P-P
to 2V
P-P
Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)
64-Pin (9mm
×
9mm) QFN Package
The LTC
®
2299 is a 14-bit 80Msps, low power dual 3V
A/D converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2299 is perfect for
demanding imaging and communications applications
with AC performance that includes 73dB SNR and 90dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include
±1.2LSB
INL (typ),
±0.5LSB
DNL (typ)
and
±5LSB
INL,
±1LSB
DNL over temperature. The transi-
tion noise is a low 1.2LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
TYPICAL APPLICATIO
+
ANALOG
INPUT A
INPUT
S/H
OV
DD
14-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D13A
D0A
OGND
CLK A
SNR (dBFS)
CLOCK/DUTY CYCLE
CONTROL
MUX
CLOCK/DUTY CYCLE
CONTROL
CLK B
OV
DD
+
ANALOG
INPUT B
INPUT
S/H
14-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D13B
D0B
OGND
2299 TA01
U
SNR vs Input Frequency,
–1dB, 2V Range
75
74
73
72
71
70
69
68
67
66
65
0
100
50
150
INPUT FREQUENCY (MHz)
200
2299 TA02
U
U
2299fa
1

DC851A-A Related Products

DC851A-A DC851A-F LTC2299CUP#PBF LTC2299IUP#TRPBF LTC2299CUP#TRPBF LTC2299IUP#PBF
Description board eval ltc2299iup board eval ltc2299iup IC ADC DUAL 14BIT 80MSPS 64QFN IC ADC DUAL 14BIT 80MSPS 64QFN IC ADC DUAL 14BIT 80MSPS 64QFN IC ADC DUAL 14BIT 80MSPS 64QFN
Brand Name - - Linear Technology Linear Technology Linear Technology Linear Technology
Is it Rohs certified? - - conform to conform to conform to conform to
Maker - - Linear ( ADI ) Linear ( ADI ) Linear ( ADI ) Linear ( ADI )
Parts packaging code - - QFN QFN QFN QFN
package instruction - - HVQCCN, LCC64,.35SQ,20 HVQCCN, LCC64,.35SQ,20 HVQCCN, LCC64,.35SQ,20 HVQCCN, LCC64,.35SQ,20
Contacts - - 64 64 64 64
Manufacturer packaging code - - UP UP UP UP
Reach Compliance Code - - compliant compliant compliant compliant
ECCN code - - 3A991.C.3 3A991.C.3 3A991.C.3 3A991.C.3
Maximum analog input voltage - - 1 V 1 V 1 V 1 V
Minimum analog input voltage - - -0.5 V -0.5 V -0.5 V -0.5 V
Converter type - - ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD ADC, PROPRIETARY METHOD
JESD-30 code - - S-PQCC-N64 S-PQCC-N64 S-PQCC-N64 S-PQCC-N64
JESD-609 code - - e3 e3 e3 e3
length - - 9 mm 9 mm 9 mm 9 mm
Maximum linear error (EL) - - 0.0305% 0.0305% 0.0305% 0.0305%
Humidity sensitivity level - - 1 1 1 1
Number of analog input channels - - 2 2 2 2
Number of digits - - 14 14 14 14
Number of functions - - 1 1 1 1
Number of terminals - - 64 64 64 64
Maximum operating temperature - - 70 °C 85 °C 70 °C 85 °C
Output bit code - - OFFSET BINARY, 2\'S COMPLEMENT BINARY OFFSET BINARY, 2\'S COMPLEMENT BINARY OFFSET BINARY, 2\'S COMPLEMENT BINARY OFFSET BINARY, 2\'S COMPLEMENT BINARY
Output format - - PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD PARALLEL, WORD
Package body material - - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - - HVQCCN HVQCCN HVQCCN HVQCCN
Encapsulate equivalent code - - LCC64,.35SQ,20 LCC64,.35SQ,20 LCC64,.35SQ,20 LCC64,.35SQ,20
Package shape - - SQUARE SQUARE SQUARE SQUARE
Package form - - CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) - - 260 260 260 260
power supply - - 3 V 3 V 3 V 3 V
Certification status - - Not Qualified Not Qualified Not Qualified Not Qualified
Sampling rate - - 80 MHz 80 MHz 80 MHz 80 MHz
Sample and hold/Track and hold - - SAMPLE SAMPLE SAMPLE SAMPLE
Maximum seat height - - 0.8 mm 0.8 mm 0.8 mm 0.8 mm
Nominal supply voltage - - 3 V 3 V 3 V 3 V
surface mount - - YES YES YES YES
technology - - CMOS CMOS CMOS CMOS
Temperature level - - COMMERCIAL INDUSTRIAL COMMERCIAL INDUSTRIAL
Terminal surface - - Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn)
Terminal form - - NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch - - 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location - - QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature - - 30 30 30 30
width - - 9 mm 9 mm 9 mm 9 mm
Base Number Matches - - 1 1 1 1

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