LTC1149
LTC1149-3.3/LTC1149-5
High Efficiency Synchronous
Step-Down Switching Regulators
FEATURES
s
s
s
DESCRIPTIO
s
s
s
s
s
s
s
Operation to 48V Input Voltage
Ultrahigh Efficiency: Up to 95%
Current Mode Operation for Excellent Line and
Load Transient Response
High Efficiency Maintained over Wide Current Range
Logic-Controlled Micropower Shutdown
Short-Circuit Protection
Very Low Dropout Operation: 100% Duty Cycle
Synchronous FET Switching for High Efficiency
Adaptive Nonoverlap Gate Drives
Available in 16-Pin Narrow SO Package
The LTC
®
1149 series is a family of synchronous step-
down switching regulator controllers featuring automatic
Burst Mode
TM
operation to maintain high efficiencies at
low output currents. These devices drive external comple-
mentary power MOSFETs at switching frequencies up
to 250kHz using a constant off-time current-mode archi-
tecture.
Special onboard regulation and level-shift circuitry allow
operation at input voltages from dropout to 48V (60V
absolute max). The constant off-time architecture main-
tains constant ripple current in the inductor, easing the
design of wide input range converters. Current mode
operation provides excellent line and load transient
response. The operating current level is user-program-
mable via an external current sense resistor.
The LTC1149 series incorporates automatic power saving
Burst Mode operation when load currents drop below the
level required for continuous operation. Standby power is
reduced to only about 8mW at V
IN
= 12V. In shutdown,
both MOSFETs are turned off.
APPLICATI
s
s
s
s
s
s
S
Notebook and Palmtop Computers
Portable Instruments
Battery-Operated Digital Devices
Industrial Power Distribution
Avionics Systems
Telecom Power Supplies
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
TYPICAL APPLICATI
1N4148
CAP
0.068µF
V
IN
V
IN
1N4148
PGATE
PDRIVE
0.047µF
D1
1N5819
P-CHANNEL
IRFR9024
L*
62µH
+
C
IN
100µF
100V
+
3.3µF
V
CC
V
CC
EFFICIENCY (%)
R
SENSE
**
0.05Ω
LTC1149-5
0V = NORMAL
>2V = SHUTDOWN
3300µF
1k
C
T
470pF
SHDN1
SHDN2
I
TH
C
T
SGND
SENSE
+
SENSE
–
NGATE
P, RGNDS
*COILTRONICS CTX62-2-MP
**KRL SL-1-C1-0R050J
1000pF
N-CHANNEL
IRFR024
V
OUT
5V/2A
+
C
OUT
220µF
60
0.02
1149 F01
Figure 1. High Efficiency Step-Down Regulator
U
LTC1149-5 Efficiency
100
FIGURE 1 CIRCUIT
V
IN
= 12V
90
V
IN
= 24V
80
70
0.2
LOAD CURRENT (A)
2
1149 TA01
UO
UO
1
LTC1149
LTC1149-3.3/LTC1149-5
ABSOLUTE
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
PGATE
V
IN
V
CC
PDRIVE
V
CC
C
T
I
TH
SENSE
–
1
2
3
4
5
6
7
8
16 CAP
15 SHDN2
14 RGND
13 NGATE
12 PGND
11 SGND
V
FB
/
10 SHDN1*
9 SENSE
+
S PACKAGE
16-LEAD PLASTIC SO
Input Supply Voltage (Pin 2)...................... – 15V to 60V
V
CC
Output Current (Pin 3) .................................. 50mA
V
CC
Input Voltage (Pin 5)........................................ 16V
Continuous Output Current (Pins 4, 13) .............. 50mA
Sense Voltages (Pins 8, 9)
V
IN
≥
12.7V .......................................... 13V to – 0.3V
V
IN
< 12.7V ............................. (V
CC
+ 0.3V) to – 0.3V
Shutdown Voltages (Pins 10, 15) ............................. 7V
Operating Temperature Range .................... 0°C to 70°C
Extended Commercial
Temperature Range ............................... – 40°C to 85°C
Junction Temperature (Note 1) ............................ 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
LTC1149CN
LTC1149CN-3.3
LTC1149CN-5
LTC1149CS
LTC1149CS-3.3
LTC1149CS-5
N PACKAGE
16-LEAD PDIP
*FIXED OUTPUT VERSIONS
T
JMAX
= 125°C,
θ
JA
= 70°C/ W (N)
T
JMAX
= 125°C,
θ
JA
= 110°C/ W (S)
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
10
I
10
V
OUT
PARAMETER
Feedback Voltage (LTC1149 Only)
Feedback Current (LTC1149 Only)
Regulated Output Voltage
LTC1149-3.3
LTC1149-5
Output Voltage Line Regulation
Output Voltage Load Regulation
LTC1149-3.3
LTC1149-5
Burst Mode Output Ripple
I
2
Input DC Supply Current (Note 3)
Normal Mode
Burst Mode
Shutdown
V
CC
V
2
– V
3
V
IN
– V
1
Internal Regulator Voltage
(Sets MOSFET Gate Drive Levels)
V
CC
Dropout Voltage
P-Gate to Source Voltage (Off)
V
IN
= 9V
T
A
= 25°C, V
IN
= 12V, V
10
= 0V (Note 2), unless otherwise noted.
MIN
q
q
CONDITIONS
TYP
1.25
0.2
MAX
1.29
1
3.43
5.2
40
65
100
UNITS
V
µA
V
V
mV
mV
mV
mV
P-P
1.21
V
IN
= 9V
I
LOAD
= 700mA
I
LOAD
= 700mA
V
IN
= 9V to 48V, I
LOAD
= 50mA
5mA < I
LOAD
< 2A
5mA < I
LOAD
< 2A
I
LOAD
= 0A
V
IN
= 12V
V
IN
= 48V
V
IN
= 12V
V
IN
= 48V
V
IN
= 12V, V
15
= 2V
V
IN
= 48V, V
15
= 2V
V
IN
= 12V to 48V
I
3
= 20mA
V
IN
= 5V, I
3
= 10mA
V
IN
= 12V
V
IN
= 48V
q
q
3.23
4.9
– 40
3.33
5.05
0
40
60
50
2.0
2.2
0.6
0.8
135
300
∆V
OUT
q
q
2.8
3.0
0.9
1.1
170
390
11
250
q
9.75
10.25
200
q
q
– 0.2
– 0.2
0
0
2
U
mA
mA
mA
mA
µA
µA
V
mV
V
V
W
U
U
W W
W
LTC1149
LTC1149-3.3/LTC1149-5
ELECTRICAL CHARACTERISTICS
SYMBOL
V
9
– V
8
PARAMETER
Current Sense Threshold Voltage
LTC1149
LTC1149-3.3
LTC1149-5
V
10
V
15
I
15
I
6
t
OFF
t
r
, t
f
Shutdown 1 Threshold
LTC1149-3.3, LTC1149-5
Shutdown 2 Threshold
Shutdown 2 Input Current
C
T
Pin Discharge Current
Off-Time (Note 4)
Driver Output Transition Times
V
15
= 5V
T
A
= 25°C, V
IN
= 12V, V
10
= 0V (Note 2), unless otherwise noted.
MIN
TYP
25
150
25
150
25
150
0.8
1.4
18
50
4
70
2
5
100
MAX
UNITS
mV
mV
mV
mV
mV
mV
V
V
µA
µA
µA
µs
ns
CONDITIONS
V
8
= 5V, V
10
= 1.32V (Forced)
V
8
= V
OUT
– 100mV
V
8
= 3.5V (Forced)
V
8
= V
OUT
– 100mV
V
8
= 5.3V (Forced)
V
8
= V
OUT
– 100mV
q
q
q
130
130
130
0.5
0.8
170
170
170
2
2
25
90
10
6
200
V
OUT
In Regulation, V
SENSE–
= V
OUT
V
OUT
= 0V
C
T
= 390pF, I
LOAD
= 700mA
C
L
= 3000pF (Pins 4, 13), V
IN
= 6V
– 40°C
≤
T
A
≤
85°C (Note 5), unless otherwise noted.
SYMBOL
V
10
V
OUT
PARAMETER
Feedback Voltage LTC1149 Only
Regulated Output Voltage
LTC1149-3.3
LTC1149-5
Input DC Supply Current (Note 3)
Normal Mode
Burst Mode
Shutdown
V
CC
V
9
– V
8
V
15
t
OFF
Internal Regulator Voltage
(Sets MOSFET Gate Drive Levels)
Current Sense Threshold Voltage
Shutdown 2 Threshold
Off-Time (Note 4)
C
T
= 390pF, I
LOAD
= 700mA, V
IN
= 10V
V
IN
= 9V
I
LOAD
= 700mA
I
LOAD
= 700mA
V
IN
= 12V
V
IN
= 48V
V
IN
= 12V
V
IN
= 48V
V
IN
= 12V, V
15
= 2V
V
IN
= 48V, V
15
= 2V
V
IN
= 12V to 48V
I
3
= 20mA
Low Threshold (Forced)
High Threshold (Forced)
9.75
CONDITIONS
MIN
1.2
3.17
4.85
TYP
1.25
3.33
5.05
2.0
2.2
0.6
0.8
135
300
10.25
25
150
1.4
5
MAX
1.3
3.43
5.2
3.2
3.5
1.05
1.30
230
520
11
UNITS
V
V
V
mA
mA
mA
mA
µA
µA
V
mV
mV
V
µs
I
2
125
0.8
3.8
175
2
6
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1:
T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formulas:
LTC1149CN, LTC1149CN-3.3, LTC1149CN-5: T
J
= T
A
+ (P
D
)(70°C/W)
LTC1149CS, LTC1149CS-3.3, LTC1149CS-5: T
J
= T
A
+ (P
D
)(110°C/W)
Note 2:
Pin 10 is a shutdown pin on the LTC1149-3.3 and LTC1149-5
fixed output voltage versions and must be at ground potential for testing.
Note 3:
Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. The allowable operating frequency
may be limited by power dissipation at high input voltages. See Typical
Performance Characteristics and Applications Information.
Note 4:
In applications where R
SENSE
is placed at ground potential, the off-
time increases approximately 40%.
Note 5:
The LTC1149, LTC1149-3.3, and LTC1149-5 are not tested and
not quality assurance sampled at – 40°C and 85°C. These specifications
are guaranteed by design and/or correlation.
3
LTC1149
LTC1149-3.3/LTC1149-5
TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Input Voltage
100
FIGURE 1 CIRCUIT
I
LOAD
= 1A
95
EFFICIENCY (%)
60
40
20
90
FIGURE 1 CIRCUIT
I
LOAD
= 1A
∆V
OUT
(mV)
∆V
OUT
(mV)
85
–40
80
–60
0
10
20
30
INPUT VOLTAGE (V)
40
50
1149 G02
0
10
30
20
INPUT VOLTAGE (V)
DC Supply Current
3.0
2.5
400
SUPPLY CURRENT (mA)
ACTIVE MODE
2.0
1.5
1.0
0.5
0
0
10
20
30
INPUT VOLTAGE (V)
40
50
1149 G04
SUPPLY CURRENT (µA)
300
NORMALIZED FREQUENCY
SLEEP MODE
Gate Charge Supply Current
30
25
20
Q
P
+ Q
N
= 100nC
15
10
Q
P
+ Q
N
= 50nC
5
0
50
100
150
200
OPERATING FREQUENCY (kHz)
250
1149 G07
GATE CHARGE CURRENT (mA)
SENSE VOLTAGE (mV)
OFF-TIME (µs)
4
U W
40
50
1149 G01
Line Regulation
20
0
–20
–40
–60
–80
–100
Load Regulation
FIGURE 1 CIRCUIT
V
IN
= 24V
0
–20
0
0.5
1.0
1.5
2.0
LOAD CURRENT (A)
2.5
1149 G03
Supply Current in Shutdown
2.0
V
SD2
= 2V
1.5
Operating Frequency
vs (V
IN
– V
OUT
)
V
OUT
= 5V
T = 0°C
T = 25°C
T = 70°C
1.0
200
100
0.5
0
0
10
30
20
INPUT VOLTAGE (V)
40
50
1149 G05
0
0
5
15
20
10
(V
IN
– V
OUT
) VOLTAGE (V)
25
1149 G06
Off-Time vs V
OUT
80
70
60
50
40
30
20
10
LTC1149-3.3
0
0
1
3
4
2
OUTPUT VOLTAGE (V)
5
1149 G08
Current Sense Threshold Voltage
160
140
120
100
80
60
40
20
0
0
20
60
40
TEMPERATURE (°C)
80
100
1149 G09
MAXIMUM
THRESHOLD
LTC1149-5
MINIMUM
THRESHOLD
LTC1149
LTC1149-3.3/LTC1149-5
PI FU CTIO S
PGATE (Pin 1):
Level-Shifted Gate Drive Signal for Top
P-Channel MOSFET. The voltage swing at Pin 1 is from V
IN
to V
IN
– V
CC
.
V
IN
(Pin 2):
Main Supply Input Pin.
V
CC
(Pin 3):
Output Pin of Low Dropout 10V Regulator.
Pin
3 is not protected against DC short circuits.
PDRIVE (Pin 4):
High Current Gate Drive for Top
P-Channel MOSFET. The voltage swing at Pin 4 is from V
CC
to ground.
V
CC
(Pin 5):
Regulated 10V Input for Driver and Control
Supplies. Must be closely decoupled to power ground.
C
T
(Pin 6):
External capacitor C
T
from Pin 6 to ground sets
the operating frequency. (The frequency is also dependent
on the ratio V
OUT
/V
IN
.)
I
TH
(Pin 7):
Gain Amplifier Decoupling Point. The current
comparator threshold increases with the Pin 7 voltage.
SENSE
–
(Pin 8):
Connects to internal resistive divider
which sets the output voltage in LTC1149-3.3 and
LTC1149-5 versions. Pin 8 is also the (–) input for the
current comparator.
SENSE
+
(Pin 9):
The (+) Input for the Current Comparator.
A built-in offset between Pins 8 and 9 in conjunction with
R
SENSE
sets the current trip threshold.
SHDN1/V
FB
(Pin 10):
In fixed output voltage versions, Pin
10 serves as a shutdown pin for the control circuitry only
(V
CC
is not affected). Taking Pin 10 of the LTC1149-3.3 or
LTC1149-5 high holds both MOSFETs off. Must be at
ground potential for normal operation.
For the LTC1149 adjustable version, Pin 10 serves as the
feedback pin from an external resistive divider used to set
the output voltage.
SGND (Pin 11):
Small-Signal Ground. Must be routed
separately from other grounds to the (–) terminal of C
OUT
.
PGND (Pin 12):
Driver Power Ground. Connects to source
of N-channel MOSFET and the (–) terminal of C
IN
.
NGATE (Pin 13):
High Current Drive for Bottom
N-channel MOSFET. The voltage swing at Pin 13 is from
ground to V
CC
.
RGND (Pin 14):
Low Dropout Regulator Ground. Con-
nects to power ground.
SHDN2 (Pin 15):
Master Shutdown Pin. Taking Pin 15
high shuts down V
CC
and all control circuitry; requires a
logic signal with t
r
, t
f
< 1µs.
CAP (Pin 16):
Charge Compensation Pin. A capacitor from
Pin 16 to V
CC
provides the charge required by the P-drive
level-shift capacitor during supply transitions.
The Pin 16
capacitor must be larger than the Pin 4 capacitor.
OPERATIO
The LTC1149 series uses a current mode, constant off-
time architecture to synchronously switch an external pair
of complementary power MOSFETs. Operating frequency
is set by an external capacitor at the timing capacitor,
Pin 6.
The output voltage is sensed either by an internal voltage
divider connected to SENSE
–
, Pin 8 (LTC1149-3.3 and
LTC1149-5) or an external divider returned to V
FB
Pin 10
(LTC1149). A voltage comparator V, and a gain block G,
compare the divided output voltage with a reference
voltage of 1.25V. To optimize efficiency, the LTC1149
series automatically switches between two modes of
operation, burst and continuous. The voltage comparator
is the primary control element for Burst Mode operation,
while the gain block controls the output voltage in continu-
ous mode.
U
U
U
U
(Refer to Functional Diagram)
A low dropout 10V regulator provides the operating volt-
age V
CC
for the MOSFET drivers and control circuitry. The
driver outputs at Pins 4 and 13 are referenced to ground,
which fulfills the N-channel MOSFET gate drive require-
ment. The P-channel gate drive at Pin 1 must be refer-
enced to the main supply input V
IN
, which is accomplished
by level-shifting the Pin 4 signal via an internal 500k
resistor and external capacitor.
During the switch “ON” cycle in continuous mode, current
comparator C monitors the voltage between Pins 8 and 9
connected across an external shunt in series with the
inductor. When the voltage across the shunt reaches its
threshold value, the PGATE output is switched to V
IN
,
turning off the P-channel MOSFET. The timing capacitor
connected to Pin 6 is now allowed to discharge at a rate
determined by the off-time controller. The discharge
5
京公网安备 11010802033920号
EEWORLD
