CS52843
CS52843
Current Mode PWM Control Circuit
Description
The CS52843 provides all the nec-
essary features to implement off-
line fixed frequency current-mode
control with a minimum number
of external components.
The CS52843 incorporates a new
precision temperature-controlled
oscillator to minimize variations in
frequency. An undervoltage lock-
out ensures that V
REF
is stabilized
before the output stage is enabled.
In the CS52843 turn on is at 8.4V
and turn off at 7.6V.
Other features include low start-up
current, pulse-by-pulse current lim-
iting, and a high-current totem pole
output for driving capacitive loads,
such as gate of a power MOSFET.
The output is low in the off state,
consistent with N-channel devices.
Features
s
Optimized for Off-line
Control
s
Internally Temperature
Compensated Oscillator
s
V
REF
Stabilized before
Output Stage is Enabled
s
Very Low Start-up Current
300 µA (typ)
s
Pulse-by-pulse Current
Limiting
s
Improved Undervoltage
Lockout
s
Double Pulse Suppression
s
2% 5 Volt Reference
s
High Current Totem Pole
Output
Absolute Maximum Ratings
Supply Voltage (I
CC
<30mA) ..........................................................Self Limiting
Supply Voltage (Low Impedance Source)...................................................30V
Output Current ...............................................................................................±1A
Output Energy (Capacitive Load) .................................................................5µJ
Analog Inputs (V
FB
, V
SENSE
)...........................................................-0.3V to 5.5V
Error Amp Output Sink Current...............................................................10mA
Lead Temperature Soldering
Reflow (SMD styles only) ...........60 sec. max above 183°C, 230°C peak
Block Diagram
V
CC
V
CC
Undervoltage Lock-out
V
CC
Pwr
Package Options
8L SO Narrow
COMP
V
FB
1
2
3
4
8
7
6
5
V
REF
V
CC
V
OUT
Gnd
34V
Gnd
8.4V/7.6V
V
FB
Error
Amplifier
-
+
2.50V
R
R
Set/
Reset
5.0 Volt
Reference
Internal
Bias
V
REF
Sense
OSC
14L SO Narrow
OUTPUT
ENABLE
COMP
COMP
1
NC
2
NOR
V
OUT
14
13
12
11
10
9
8
V
REF
NC
V
CC
V
CC
Pwr
V
OUT
Pwr Gnd
Gnd
OSC
Oscillator
S
V
FB
3
NC
4
2R
R
Sense
1V
Pwr Gnd
R
PWM
Current
Sensing Latch
Comparator
Sense
5
NC
6
OSC
7
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 12/23/97
1
A
®
Company
CS52843
Electrical Characteristics: -40
≤
T
A
≤
85˚C; V
CC
= 15V (Note 1); R
T
= 680Ω; C
T
= .022µF for triangle mode,
R
T
= 10kΩ; C
T
= 3.3nF sawtooth mode unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
Reference Section
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short Circuit
s
Oscillator Section
Initial Accuracy
Voltage Stability
Temperature Stability
Amplitude
Discharge Current
Sawtooth Mode, T
J
= 25˚C (Note 1)
Triangle Mode, T
J
= 25˚C
12
≤
V
CC
≤
25V
Sawtooth Mode T
MIN
≤
T
A
≤
T
MAX
Triangle Mode T
MIN
≤
T
A
≤
T
MAX
(Note 1)
V
OSC
(peak to peak)
T
J
= 25˚C
T
MIN
≤
T
A
≤
T
MAX
s
Error Amp Section
Input Voltage
Input Bias Current
A
VOL
Unity Gain Bandwidth
PSRR
Output Sink Current
Output Source Current
V
OUT
HIGH
V
OUT
LOW
s
Current Sense Section
Gain
Maximum Input Signal
PSRR
Input Bias Current
Delay to Output
s
Output Section
Output Low Level
Output High Level
I
SINK
= 20mA
I
SINK
= 200mA
I
SOURCE
= 20mA
I
SOURCE
= 200mA
13.0
12.0
0.1
1.5
13.5
13.5
0.4
2.2
V
V
V
V
(Notes 2 & 3)
V
COMP
= 5V (Note 2)
12
≤
V
CC
≤
25V (Note 2)
V
Sense
=0V
T
J
=25˚C (Note 1)
2.85
0.9
3.00
1.0
70
-2
150
-10
300
3.15
1.1
V/V
V
dB
µA
ns
V
COMP
= 2.5V
V
FB
= 0V
2
≤
V
OUT
≤
4V
(Note 1)
12
≤
V
CC
≤
25V
V
FB
= 2.7V, V
COMP
= 1.1V
V
FB
= 2.3V, V
COMP
= 5V
V
FB
= 2.3V, R
L
= 15kΩ to Gnd
V
FB
= 2.7V, R
L
= 15kΩ to V
REF
65
0.7
60
2
-0.5
5
2.42
2.50
-0.3
90
1.0
70
6
-0.8
6
0.7
1.1
2.58
-2.0
V
µA
dB
MHz
dB
mA
mA
V
V
7.3
6.8
47
44
52
52
0.2
5
8
1.7
8.3
9.3
9.8
57
60
1.0
kHz
kHz
%
%
%
V
mA
mA
T
J
= 25˚C, I
REF
= 1mA
12
≤
V
CC
≤
25V
1
≤
I
RE F
≤
20mA
(Note 1)
Line, Load, Temp. (Note 1)
10Hz
≤
f
≤
10kHz, T
J
= 25˚C (Note 1)
T
A
= 125˚C, 1000 Hrs. (Note 1)
T
A
= 25˚C
-30
4.82
50
5
-100
25
-180
4.90
5.00
6
6
0.2
5.10
20
25
0.4
5.18
V
mV
mV
mV/˚C
V
µV
mV
mA
2
CS52843
Electrical Characteristics: -40
≤
T
A
≤
85˚C; V
CC
= 15V (Note 1); R
T
= 680Ω; C
T
= .022µF for triangle mode,
R
T
= 10kΩ; C
T
= 3.3nF sawtooth mode unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Rise Time
Fall Time
Output Leakage
s
Total Standby Current
Start-Up Current
Operating Supply Current
V
CC
Zener Voltage
T
J
= 25˚C, C
L
= 1nF (Note 1)
T
J
=25˚C, C
L
=1nF (Note 1)
UVLO Active V
OUT
= 0
50
50
-.01
150
150
-10.0
ns
ns
µA
300
V
FB
=V
Sense
=0V R
T
=10kΩ, C
T
=3.3nF
I
CC
=25mA
11
34
500
17
µA
mA
V
s
Undervoltage Lockout Section
Start Threshold
Min. Operating Voltage
Notes:
7.8
After Turn On
7.0
8.4
7.6
9.0
8.2
V
V
1.These parameters, although guaranteed, are not 100% tested in production.
2. Parameter measured at trip point of latch with V
FB
=0.
3. Gain defined as: A =
∆V
COMP
∆V
Sense
; 0
≤
V
Sense
≤
0.8V.
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
8L
SO Narrow
1
2
3
4
5
5
6
7
7
8
14L
SO Narrow
1
3
5
7
8
9
10
11
12
14
2,4,6,13
COMP
V
FB
Sense
OSC
Gnd
Pwr Gnd
V
OUT
V
CC
Pwr
V
CC
V
REF
NC
Error amp output, used to compensate error amplifier.
Error amp inverting input.
Noninverting input to Current Sense Comparator.
Oscillator timing network with Capacitor to Ground, resistor to V
REF
.
Ground.
Output driver Ground.
Output drive pin.
Output driver positive supply.
Positive power supply.
Output of 5V internal reference.
No Connection.
3
CS52843
Typical Performance Characteristics
100
90
900
800
R
T
=680Ω
700
80
DUTY CYCLE (%)
70
60
50
40
30
FREQ. (kHz)
600
500
R
T
=1.5kΩ
400
300
200
100
R
T
=10kΩ
20
10
.0005
.001
.002
.003
.005
.01
.02
.03 .04 .05
100
200
300 400 500 700
1k
2k
3k 4k 5k
7k
10k
C
T
(µF)
R
T
(Ω)
Oscillator Frequency vs C
T
Oscillator Duty Cycle vs R
T
Test Circuit Open Loop Laboratory Test Fixture
V
REF
R
T
2N2222
100kΩ
4.7kΩ
1kΩ
Error Amp
Adjust
4.7kΩ
5kΩ
A
COMP
V
REF
0.1µF
V
CC
V
FB
V
CC
0.1µF
1kΩ
1W
Sense
Adjust
Sense
V
OUT
V
OUT
OSC
Gnd
Gnd
C
T
Circuit Description
V
CC
ON/OFF Command
to reset of IC
V
ON
=8.4V
V
OFF
= 7.6V
Undervoltage Lockout
During Undervoltage Lockout (Figure 1), the output driv-
er is biased to sink minor amounts of current. The output
should be shunted to ground with a resistor to prevent
activating the power switch with extraneous leakage cur-
rents.
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
which represents the peak output inductor current (Figure
2). An increase in V
CC
causes the inductor current slope to
increase, thus reducing the duty cycle. This is an inherent
feed-forward characteristic of current mode control, since
the control voltage does not have to change during
changes of input supply voltage.
4
I
CC
<15mA
<500µA
V
ON
V
OFF
V
CC
Figure 1: Startup voltage for the CS52843.
CS52843
Circuit Description
When the power supply sees a sudden large output cur-
rent increase, the control voltage will increase allowing the
duty cycle to momentarily increase. Since the duty cycle
tends to exceed the maximum allowed to prevent trans-
former saturation in some power supplies, the internal
oscillator waveform provides the maximum duty cycle
clamp as programmed by the selection of oscillator timing
components.
V
OSC
OSC
RESET
Toggle
F/F Output
EA Output
Switch
Current
V
CC
Setting the Oscillator
The times T
c
and T
d
can be determined as follows:
t
c
= R
T
C
T
ln
t
d
= R
T
C
T
ln
(
(
V
REF
- V
LOWER
V
REF
- V
UPPER
)
)
V
REF
- I
d
R
T
- V
LOWER
V
REF
- I
d
R
T
- V
UPPER
Substituting in typical values for the parameters in the
above formulas:
V
REF
= 5.0V, V
UPPER
= 2.7V, V
LOWER
= 1.0V, I
d
= 8.3mA,
then
t
c
≈
0.5534R
T
C
T
I
O
t
d
= R
T
C
T
ln
V
O
(
2.3 - 0.0083 R
T
4.0 - 0.0083 R
T
)
Figure 2: Timing Diagram
For better accuracy R
T
should be
≥10kΩ.
Grounding
V
REF
R
T
OSC
C
T
Gnd
High peak currents associated with capacitive loads neces-
sitate careful grounding techniques. Timing and bypass
capacitors should be connected close to Gnd in a single
point ground.
The transistor and 5kΩ potentiometer are used to sample
the oscillator waveform and apply an adjustable ramp to
Sense.
V
upper
V
lower
t
c
t
d
Sawtooth Mode
LARGE R
T
(≈10kΩ)
V
OSC
Internal Clock
Triangular Mode
SMALL R
T
(≈700kΩ)
V
REF
Internal Clock
Figure 3: Oscillator Timing Network and Parameters
5