BX80621E52603/SR0LB datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> BX80621E52603/SR0LB

BX80621E52603/SR0LB: DescriptionRISC Microprocessor, 64-Bit, 1800MHz, CMOS, PBGA2011; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，258 Pages; ManufacturerIntel; Websitehttp://www.intel.com/; Environmental Compliance

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BX80621E52603/SR0LB Overview

RISC Microprocessor, 64-Bit, 1800MHz, CMOS, PBGA2011

BX80621E52603/SR0LB Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	113558696
package instruction	LGA, LGA2011(UNSPEC)
Reach Compliance Code	compliant
YTEOL	0
bit size	64
Number of terminals	2011
Package body material	PLASTIC/EPOXY
encapsulated code	LGA
Encapsulate equivalent code	LGA2011(UNSPEC)
Package form	GRID ARRAY
Certification status	Not Qualified
speed	1800 MHz
Maximum slew rate	100000 mA
surface mount	YES
technology	CMOS
Terminal form	NO LEAD
Terminal location	BOTTOM
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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Intel® Xeon® Processor E5-1600

and E5-2600 Product Families

Datasheet - Volume One

March 2012

Reference Number: 326508, Revision: 001

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,

BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS

PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER

AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING

LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY

PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE RELATING NO LICENSE, Express* OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY CREATE A GRANTED WHERE DOCUMENT. EXCEPT AS

SALE AND/OR IN THIS DOCUMENT IS PROVIDED IN LIABILITY OR WARRANTIES NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE FAILURE OF THE INTEL PRODUCT COULD RIGHTS ISSITUATIONBY THIS PERSONAL INJURY OR DEATH MAY IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY Express* OR IMPLIED WARRANTY, RELATING TO

INFORMATION USE OF INTEL PRODUCTS INCLUDING CONNECTION WITH Intel® PRODUCTS. TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. PROVIDED OCCUR.

UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY

APPLICATION IN WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH

MAY OCCUR.

Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the

absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future

definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The

information here is subject to change without notice. Do not finalize a design with this information.

The Intel® Xeon® processor E5-1600 and E5-2600 product families, Intel® C600 series chipset, and the Intel® Xeon® processor

E5-1600 and E5-2600 product families-based Platform described in this document may contain design defects or errors known as

errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained

by calling 1-800-548-4725, or go to:

http://www.intel.com/#/en_US_01

Hyper-Threading Technology requires a computer system with a processor supporting HT Technology and an HT Technology

enabled chipset, BIOS and operating system. Performance will vary depending on the specific hardware and software you use. For

more information including details on which processors support HT Technology, see

http://www.intel.com/products/ht/hyperthreading_more.htm.

Enabling Execute Disable Bit functionality requires a PC with a processor with Execute Disable Bit capability and a supporting

operating system. Check with your PC manufacturer on whether your system delivers Execute Disable Bit functionality.

Intel® Virtualization Technology requires a computer system with an enabled Intel® processor, BIOS, virtual machine monitor

(VMM) and, for some uses, certain computer system software enabled for it. Functionality, performance or other benefits will vary

depending on hardware and software configurations and may require a BIOS update. Software applications may not be compatible

with all operating systems. Please check with your application vendor.

Intel® Turbo Boost Technology requires a PC with a processor with Intel Turbo Boost Technology capability. Intel Turbo Boost

Technology performance varies depending on hardware, software and overall system configuration. Check with your PC

manufacturer on whether your system delivers Intel Turbo Boost Technology. For more information, see

http://www.intel.com/technology/turboboost/.

64-bit computing on Intel architecture requires a computer system with a processor, chipset, BIOS, operating system, device

drivers and applications enabled for Intel® 64 architecture. Performance will vary depending on your hardware and software

configurations. Consult with your system vendor for more information.

Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor

family, not across different processor families. See

http://www.intel.com/products/processor%5Fnumber/

for details.

C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I

C bus/protocol and was developed

by Intel. Implementations of the I

C bus/protocol may require licenses from various entities, including Philips Electronics N.V. and

North American Philips Corporation.

Intel, Xeon, Intel SpeedStep, Intel Core, and the Intel logo are trademarks of Intel Corporation in the U. S. and other countries.

*Other names and brands may be claimed as the property of others.

Intel® Xeon® Processor E5-1600 and E5-2600 Product Families

Datasheet Volume One

Contents

Overview

................................................................................................................. 13

1.1

Introduction ..................................................................................................... 13

1.1.1 Processor Feature Details ........................................................................ 14

1.1.2 Supported Technologies .......................................................................... 14

1.2

Interfaces ........................................................................................................ 15

1.2.1 System Memory Support ......................................................................... 15

1.2.2 PCI Express* ......................................................................................... 16

1.2.3 Direct Media Interface Gen 2 (DMI2)......................................................... 17

1.2.4 Intel® QuickPath Interconnect (Intel® QPI) .............................................. 18

1.2.5 Platform Environment Control Interface (PECI) ........................................... 18

1.3

Power Management Support ............................................................................... 19

1.3.1 Processor Package and Core States........................................................... 19

1.3.2 System States Support ........................................................................... 19

1.3.3 Memory Controller.................................................................................. 19

1.3.4 PCI Express ........................................................................................... 19

1.3.5 Intel QPI ............................................................................................... 19

1.4

Thermal Management Support ............................................................................ 19

1.5

Package Summary............................................................................................. 20

1.6

Terminology ..................................................................................................... 20

1.7

Related Documents ........................................................................................... 22

1.8

State of Data .................................................................................................... 23

Interfaces................................................................................................................

2.1

System Memory Interface .................................................................................. 25

2.1.1 System Memory Technology Support ........................................................ 25

2.1.2 System Memory Timing Support............................................................... 25

2.2

PCI Express* Interface....................................................................................... 26

2.2.1 PCI Express* Architecture ....................................................................... 26

2.2.2 PCI Express* Configuration Mechanism ..................................................... 27

2.3

DMI2/PCI Express* Interface .............................................................................. 28

2.3.1 DMI2 Error Flow ..................................................................................... 28

2.3.2 Processor/PCH Compatibility Assumptions.................................................. 28

2.3.3 DMI2 Link Down..................................................................................... 28

2.4

Intel QuickPath Interconnect............................................................................... 28

2.5

Platform Environment Control Interface (PECI) ...................................................... 30

2.5.1 PECI Client Capabilities ........................................................................... 30

2.5.2 Client Command Suite ............................................................................ 31

2.5.3 Client Management................................................................................. 69

2.5.4 Multi-Domain Commands ........................................................................ 74

2.5.5 Client Responses .................................................................................... 75

2.5.6 Originator Responses .............................................................................. 76

2.5.7 DTS Temperature Data ........................................................................... 76

Technologies

........................................................................................................... 79

3.1

Intel® Virtualization Technology (Intel® VT) ........................................................ 79

3.1.1 Intel VT-x Objectives .............................................................................. 79

3.1.2 Intel VT-x Features................................................................................. 80

3.1.3 Intel VT-d Objectives .............................................................................. 80

3.1.4 Intel Virtualization Technology Processor Extensions ................................... 81

3.2

Security Technologies ........................................................................................ 81

3.2.1 Intel® Trusted Execution Technology........................................................ 81

3.2.2 Intel Trusted Execution Technology – Server Extensions .............................. 82

3.2.3 Intel® Advanced Encryption Standard Instructions (Intel® AES-NI).............. 82

Intel® Xeon® Processor E5-1600 and E5-2600 Product Families

Datasheet Volume One

3.3

3.4

3.5

3.6

3.7

3.8

3.2.4 Execute Disable Bit .................................................................................83

Intel® Hyper-Threading Technology .....................................................................83

Intel® Turbo Boost Technology ...........................................................................83

3.4.1 Intel® Turbo Boost Operating Frequency ...................................................83

Enhanced Intel SpeedStep® Technology ...............................................................84

Intel® Intelligent Power Technology.....................................................................84

Intel® Advanced Vector Extensions (Intel® AVX) ..................................................84

Intel Dynamic Power Technology .........................................................................85

Power Management

.................................................................................................87

4.1

ACPI States Supported .......................................................................................87

4.1.1 System States........................................................................................87

4.1.2 Processor Package and Core States ...........................................................87

4.1.3 Integrated Memory Controller States .........................................................88

4.1.4 DMI2/PCI Express* Link States.................................................................89

4.1.5 Intel QuickPath Interconnect States ..........................................................89

4.1.6 G, S, and C State Combinations................................................................90

4.2

Processor Core/Package Power Management .........................................................90

4.2.1 Enhanced Intel SpeedStep Technology.......................................................90

4.2.2 Low-Power Idle States.............................................................................91

4.2.3 Requesting Low-Power Idle States ............................................................92

4.2.4 Core C-states .........................................................................................92

4.2.5 Package C-States ...................................................................................94

4.2.6 Package C-State Power Specifications........................................................97

4.3

System Memory Power Management ....................................................................98

4.3.1 CKE Power-Down ....................................................................................98

4.3.2 Self Refresh ...........................................................................................98

4.3.3 DRAM I/O Power Management ..................................................................99

4.4

DMI2/PCI Express* Power Management ................................................................99

Thermal Management Specifications

...................................................................... 101

5.1

Package Thermal Specifications ......................................................................... 101

5.1.1 Thermal Specifications........................................................................... 101

5.1.2 TCASE and DTS Based Thermal Specifications........................................... 103

5.1.3 Processor Thermal Profiles ..................................................................... 104

5.1.4 Embedded Server Processor Thermal Profiles............................................ 130

5.1.5 Thermal Metrology ................................................................................ 133

5.2

Processor Core Thermal Features ....................................................................... 135

5.2.1 Processor Temperature.......................................................................... 135

5.2.2 Adaptive Thermal Monitor ...................................................................... 135

5.2.3 On-Demand Mode ................................................................................. 137

5.2.4 PROCHOT_N Signal ............................................................................... 137

5.2.5 THERMTRIP_N Signal ............................................................................ 138

5.2.6 Integrated Memory Controller (IMC) Thermal Features............................... 138

Signal Descriptions

................................................................................................ 141

6.1

System Memory Interface Signals ...................................................................... 141

6.2

PCI Express* Based Interface Signals ................................................................. 142

6.3

DMI2/PCI Express* Port 0 Signals ...................................................................... 144

6.4

Intel QuickPath Interconnect Signals .................................................................. 144

6.5

PECI Signal ..................................................................................................... 145

6.6

System Reference Clock Signals ........................................................................ 145

6.7

JTAG and TAP Signals....................................................................................... 145

6.8

Serial VID Interface (SVID) Signals .................................................................... 146

6.9

Processor Asynchronous Sideband and Miscellaneous Signals................................. 146

6.10 Processor Power and Ground Supplies ................................................................ 149

Intel® Xeon® Processor E5-1600 and E5-2600 Product Families

Datasheet Volume One

Electrical Specifications

......................................................................................... 151

7.1

Processor Signaling ......................................................................................... 151

7.1.1 System Memory Interface Signal Groups ................................................. 151

7.1.2 PCI Express* Signals ............................................................................ 151

7.1.3 DMI2/PCI Express* Signals.................................................................... 151

7.1.4 Intel QuickPath Interconnect (Intel QPI) .................................................. 151

7.1.5 Platform Environmental Control Interface (PECI) ...................................... 152

7.1.6 System Reference Clocks (BCLK{0/1}_DP, BCLK{0/1}_DN)....................... 152

7.1.7 JTAG and Test Access Port (TAP) Signals ................................................. 153

7.1.8 Processor Sideband Signals ................................................................... 153

7.1.9 Power, Ground and Sense Signals........................................................... 153

7.1.10 Reserved or Unused Signals................................................................... 158

7.2

Signal Group Summary .................................................................................... 158

7.3

Power-On Configuration (POC) Options............................................................... 162

7.4

Fault Resilient Booting (FRB)............................................................................. 163

7.5

Mixing Processors............................................................................................ 163

7.6

Flexible Motherboard Guidelines (FMB) ............................................................... 164

7.7

Absolute Maximum and Minimum Ratings ........................................................... 164

7.7.1 Storage Conditions Specifications ........................................................... 165

7.8

DC Specifications ............................................................................................ 166

7.8.1 Voltage and Current Specifications.......................................................... 167

7.8.2 Die Voltage Validation ........................................................................... 173

7.8.3 Signal DC Specifications ........................................................................ 174

7.9

Waveforms..................................................................................................... 180

7.10 Signal Quality ................................................................................................. 181

7.10.1 DDR3 Signal Quality Specifications ......................................................... 182

7.10.2 I/O Signal Quality Specifications............................................................. 182

7.10.3 Intel QuickPath Interconnect Signal Quality Specifications.......................... 182

7.10.4 Input Reference Clock Signal Quality Specifications................................... 182

7.10.5 Overshoot/Undershoot Tolerance............................................................ 182

Processor Land Listing...........................................................................................

187

8.1

Listing by Land Name ...................................................................................... 187

8.2

Listing by Land Number ................................................................................... 212

Package Mechanical Specifications

........................................................................ 237

9.1

Package Mechanical Drawing............................................................................. 237

9.2

Processor Component Keep-Out Zones ............................................................... 241

9.3

Package Loading Specifications ......................................................................... 241

9.4

Package Handling Guidelines............................................................................. 241

9.5

Package Insertion Specifications........................................................................ 241

9.6

Processor Mass Specification ............................................................................. 242

9.7

Processor Materials.......................................................................................... 242

9.8

Processor Markings.......................................................................................... 242

Boxed Processor Specifications

............................................................................. 243

10.1 Introduction ................................................................................................... 243

10.1.1 Available Boxed Thermal Solution Configurations ...................................... 243

10.1.2 Intel Thermal Solution STS200C

(Passive/Active Combination Heat Sink Solution) ...................................... 243

10.1.3 Intel Thermal Solution STS200P and STS200PNRW

(Boxed 25.5 mm Tall Passive Heat Sink Solutions).................................... 244

10.2 Mechanical Specifications ................................................................................. 245

10.2.1 Boxed Processor Heat Sink Dimensions and Baseboard Keepout Zones ........ 245

10.2.2 Boxed Processor Retention Mechanism and Heat Sink Support (ILM-RS) ...... 254

10.3 Fan Power Supply [STS200C]............................................................................ 254

10.3.1 Boxed Processor Cooling Requirements ................................................... 255

10.4 Boxed Processor Contents ................................................................................ 257

Intel® Xeon® Processor E5-1600 and E5-2600 Product Families

Datasheet Volume One

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