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CWB2269CY

Description
CMOS/DMOS Wideband Dual SPDT Analog Switch
CategoryAnalog mixed-signal IC    The signal circuit   
File Size35KB,4 Pages
ManufacturerCalogic
Websitehttp://www.calogic.net/
Download Datasheet Parametric Compare View All

CWB2269CY Overview

CMOS/DMOS Wideband Dual SPDT Analog Switch

CWB2269CY Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeSOIC
package instructionSOP, SOP16,.25
Contacts16
Reach Compliance Codecompli
ECCN codeEAR99
Analog Integrated Circuits - Other TypesSPDT
JESD-30 codeR-PDSO-G16
JESD-609 codee0
Maximum negative supply voltage (Vsup)-15 V
Negative supply voltage minimum (Vsup)-8 V
Nominal Negative Supply Voltage (Vsup)-15 V
Number of channels1
Number of functions2
Number of terminals16
Nominal off-state isolation15 dB
Maximum on-state resistance (Ron)160 Ω
Maximum operating temperature85 °C
Minimum operating temperature
outputSEPARATE OUTPUT
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply+-15 V
Certification statusNot Qualified
Maximum supply voltage (Vsup)15 V
Minimum supply voltage (Vsup)8 V
Nominal supply voltage (Vsup)15 V
surface mountYES
Maximum disconnect time200 ns
Maximum connection time250 ns
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Base Number Matches1
CMOS/DMOS Wideband Dual
SPDT Analog Switch
CORPORATION
CWB2269
FEATURES
DESCRIPTION
The CWB2269 is a Precision Dual Single Pole, Double Throw
Analog Switch for precision applications in instrumentation,
communications and process control where low leakage and
high speed switching are required. Designed on the Calogic
CMOS/DMOS process this analog switch takes advantage of
high speed DMOS switching FETs combined with low voltage
CMOS technology in a monolithic structure.
ORDERING INFORMATION
Part
Package
Temperature Range
CWB2269CP Plastic 16-Pin Dip
0 to +85
o
C
CWB2269CY Plastic SO-16 Surface Mount 0 to +85
o
C
XCWB2269 Sorted Chips in Carriers
0 to +85
o
C
High OFF Isolation
Low Channel-to-Channel Crosstalk
Wide Bandwidth Range . . . . . . . . . . . +10V to -10V
Broad Analog Signal
Low ON Resistance . . . . . . . . . . . . . . . . . 20ohms typical
Low Capacitance
Data Latches
RF and Video Switching
High Speed Data Acquisition
ATE
Precision Instrumentation
PIN CONFIGURATION
APPLICATIONS
FUNCTION DIAGRAM
16 PIN PLASTIC DIP
SO-16 PLASTIC
16 V+
15 CLEAR/RESET
14 ANALOG GND
13 SW 2/1
12 GND
11 A
1
10 OUT SW 1/1
9
IN SW 1/1
SW 1/0 IN
SW 1/0 OUT
A
0
GND
SW 2/0
ANALOG GND
LATCH ENABLE
V-
1
2
3
4
5
6
7
8
TOP VIEW
CWB2269CY
16 V+
15 CLEAR/RESET
14 ANALOG GND
13 SW 2/1
12 GND
11 A
1
10 OUT SW 1/1
9
IN SW 1/1
SW 1/0 IN 1
SW 2/0 IN 5
Q
LT
A
0
3
D
Q
2 OUT SW 1/0
6 OUT SW 2/0
SW 2/1
SW 1/0 IN
SW 1/0 OUT
A
0
GND
SW 2/0
ANALOG GND
LATCH ENABLE
V-
1
2
3
4
5
6
7
8
TOP VIEW
CWB2269CP
C 15
A
1
11
L
E
7
SW 2/1 IN 13
SW 1/1 IN 9
D
Q
Q
14 OUT SW 2/0
SW 2/1
10 OUT SW 1/1
SWITCHES SHOWN IN LOGIC '0' POSITION
SW 1/0
1
2
5
9
SW 1/1
10
13
SW 2/0
6
SW 2/1
14
LT
CWB
FUNCTION TABLE
INPUT
A
L
H
X
L
E
H
H
X
C
L
L
H
SWITCH
SW
1
ON
OFF
OFF
SW
2
OFF
ON
ON
L
L
L
*(1)
*(2)
X = undefined
*(1) Hold input state one setup before L
E
High to Low
transaction. If Input state Low then Switch ON. If
Input state High then Switch OFF.
*(2) SW
1
= SW
2
All devices contain diodes to protect inputs against damage
due to high static voltages or electric fields; however, it is
advised that precautions be taken not to exceed the maximum
recommended input voltages. All unused inputs must be
connected to an appropriate logic level (either Vcc or GND).

CWB2269CY Related Products

CWB2269CY CWB2269 CWB2269CP
Description CMOS/DMOS Wideband Dual SPDT Analog Switch CMOS/DMOS Wideband Dual SPDT Analog Switch CMOS/DMOS Wideband Dual SPDT Analog Switch
Is it lead-free? Contains lead - Contains lead
Is it Rohs certified? incompatible - incompatible
Parts packaging code SOIC - DIP
package instruction SOP, SOP16,.25 - DIP, DIP16,.3
Contacts 16 - 16
Reach Compliance Code compli - compli
ECCN code EAR99 - EAR99
Analog Integrated Circuits - Other Types SPDT - SPDT
JESD-30 code R-PDSO-G16 - R-PDIP-T16
JESD-609 code e0 - e0
Maximum negative supply voltage (Vsup) -15 V - -15 V
Negative supply voltage minimum (Vsup) -8 V - -8 V
Nominal Negative Supply Voltage (Vsup) -15 V - -15 V
Number of channels 1 - 1
Number of functions 2 - 2
Number of terminals 16 - 16
Nominal off-state isolation 15 dB - 15 dB
Maximum on-state resistance (Ron) 160 Ω - 160 Ω
Maximum operating temperature 85 °C - 85 °C
output SEPARATE OUTPUT - SEPARATE OUTPUT
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code SOP - DIP
Encapsulate equivalent code SOP16,.25 - DIP16,.3
Package shape RECTANGULAR - RECTANGULAR
Package form SMALL OUTLINE - IN-LINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED
power supply +-15 V - +-15 V
Certification status Not Qualified - Not Qualified
Maximum supply voltage (Vsup) 15 V - 15 V
Minimum supply voltage (Vsup) 8 V - 8 V
Nominal supply voltage (Vsup) 15 V - 15 V
surface mount YES - NO
Maximum disconnect time 200 ns - 200 ns
Maximum connection time 250 ns - 250 ns
technology CMOS - CMOS
Temperature level OTHER - OTHER
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb)
Terminal form GULL WING - THROUGH-HOLE
Terminal pitch 1.27 mm - 2.54 mm
Terminal location DUAL - DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED
Base Number Matches 1 - 1
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