B80546KG0961M datasheet, PDF - EEWORLD Datasheet

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B80546KG0961M: DescriptionRISC Microprocessor, 32-Bit, 3400MHz, CMOS, PPGA604,; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，96 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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B80546KG0961M Overview

RISC Microprocessor, 32-Bit, 3400MHz, CMOS, PPGA604,

B80546KG0961M Parametric

Parameter Name	Attribute value
Objectid	1167370264
Parts packaging code	PGA
package instruction	SPGA, PGA604,25X31,50
Contacts	604
Reach Compliance Code	compliant
YTEOL	0
bit size	32
JESD-30 code	R-PPGA-P604
Number of terminals	604
Package body material	PLASTIC/EPOXY
encapsulated code	SPGA
Encapsulate equivalent code	PGA604,25X31,50
Package shape	RECTANGULAR
Package form	GRID ARRAY, SHRINK PITCH
Certification status	Not Qualified
speed	3400 MHz
Maximum slew rate	120000 mA
Nominal supply voltage	1.2 V
surface mount	NO
technology	CMOS
Terminal form	PIN/PEG
Terminal pitch	1.27 mm
Terminal location	PERPENDICULAR
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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Intel® Xeon™ Processor with 800 MHz

System Bus

Datasheet

Product Features

■

Available at 2.80, 3, 3.20, 3.40, 3.60 GHz

90 nm process technology

Dual processing server/workstation support

Binary compatible with applications

running on previous members of Intel’s

IA-32 microprocessor line

Intel® NetBurst™ micro-architecture

Hyper-Threading Technology

Hardware support for multithreaded

applications

Faster 800 MHz system bus

Rapid Execution Engine: Arithmetic Logic

Units (ALUs) run at twice the processor

core frequency

Hyper Pipelined Technology

Advanced Dynamic Execution

Very deep out-of-order execution

Enhanced branch prediction

Includes 16-KB Level 1 data cache

■

Intel® Extended Memory 64 Technology

1-MB Advanced Transfer Cache (On-die,

full speed Level 2 (L2) Cache) with 8-way

associativity and Error Correcting Code

(ECC)

Enables system support of up to 64 GB of

physical memory

144 Streaming SIMD Extensions 2 (SSE2)

instructions

13 Streaming SIMD Extensions 3 (SSE3)

instructions

Enhanced floating-point and multimedia

unit for enhanced video, audio, encryption,

and 3D performance

System Management mode

Thermal Monitor

Machine Check Architecture (MCA)

Demand-Based Switching (DBS) with

Enhanced Intel SpeedStep® Technology

The Intel® Xeon™ processor with 800 MHz system bus is designed for high-performance

dual-processor workstation and server applications. Based on the Intel® NetBurst™ micro-

architecture and the Hyper-Threading Technology, it is binary compatible with previous Intel

Architecture (IA-32) processors. The Intel Xeon processor with 800 MHz system bus is scalable

to two processors in a multiprocessor system providing exceptional performance for applications

running on advanced operating systems such as Windows XP*, Windows Server* 2003, Linux*,

and UNIX*.

The Intel Xeon processor with 800 MHz system bus

delivers compute power at unparalleled value and

flexibility for powerful workstations, internet

infrastructure, and departmental server applications. The

Intel NetBurst micro-architecture and Hyper-Threading

Technology deliver outstanding performance and

headroom for peak internet server workloads, resulting in

faster response times, support for more users, and

improved scalability.

Document Number: 302355-001

June 2004

Intel® Xeon™ Processor with 800 MHz System Bus

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY

ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN

INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS

ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES

RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER

INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for

future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The Intel® Xeon™ processor with 800 MHz system bus may contain design defects or errors known as errata which may cause the product to deviate

from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling

1-800-548-4725 or by visiting Intel's website at http://www.intel.com.

Intel, Pentium, Intel Xeon, SpeedStep, and Intel NetBurst are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United

States and other countries.

Intel® Extended Memory 64 Technology (Intel® EM64T) requires a computer system with a processor, chipset, BIOS, OS, device drivers and

applications enabled for Intel EM64T. Processor will not operate (including 32-bit operation) without an Intel EM64T-enabled BIOS. Performance will

vary depending on your hardware and software configurations. Intel EM64T-enabled OS, BIOS, device drivers and applications may not be available.

Check with your vendor for more information.

Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across

different processor families. See www.intel.com/products/processor_number for details.

* Other names and brands may be claimed as the property of others.

∆

Datasheet

Intel® Xeon™ Processor with 800 MHz System Bus

Contents

1.0

Introduction....................................................................................................................................

1.1

1.2

1.3

2.0

Terminology ........................................................................................................................ 10

References ......................................................................................................................... 12

State of Data....................................................................................................................... 12

Electrical Specifications

............................................................................................................ 13

2.1

2.2

Power and Ground Pins...................................................................................................... 13

Decoupling Guidelines........................................................................................................ 13

2.2.1 V

Decoupling ..................................................................................................... 13

2.2.2 VTT Decoupling ..................................................................................................... 13

2.2.3 Front Side Bus AGTL+ Decoupling........................................................................ 13

Front Side Bus Clock (BCLK[1:0]) and Processor Clocking ............................................... 14

2.3.1 Front Side Bus Frequency Select Signals (BSEL[1:0]).......................................... 14

2.3.2 Phase Lock Loop (PLL) and Filter ......................................................................... 15

Voltage Identification (VID) ................................................................................................. 15

Reserved or Unused Pins................................................................................................... 17

Front Side Bus Signal Groups ............................................................................................ 18

GTL+ Asynchronous and AGTL+ Asynchronous Signals ................................................... 20

Test Access Port (TAP) Connection ................................................................................... 21

Mixing Processors .............................................................................................................. 21

Absolute Maximum and Minimum Ratings ......................................................................... 21

Processor DC Specifications .............................................................................................. 22

2.11.1 Flexible Motherboard Guidelines (FMB) ................................................................ 22

2.11.2 VCC Overshoot Specification ................................................................................ 27

2.11.3 Die Voltage Validation ........................................................................................... 28

Package Mechanical Drawings........................................................................................... 31

Processor Component Keepout Zones............................................................................... 34

Package Loading Specifications......................................................................................... 34

Package Handling Guidelines............................................................................................. 35

Package Insertion Specifications........................................................................................ 35

Processor Mass Specifications........................................................................................... 35

Processor Materials ............................................................................................................ 35

Processor Markings ............................................................................................................ 36

Processor Pinout Coordinates ............................................................................................ 37

Signal Definitions ................................................................................................................ 39

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

3.0

Mechanical Specifications..........................................................................................................

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

4.0

Signal Definitions

....................................................................................................................... 39

4.1

5.0

Pin List..........................................................................................................................................

5.1

Intel® Xeon™ Processor with 800 MHz System Bus Pin Assignments ............................. 49

5.1.1 Pin Listing by Pin Name......................................................................................... 50

5.1.2 Pin Listing by Pin Number ..................................................................................... 58

Datasheet

Intel® Xeon™ Processor with 800 MHz System Bus

6.0

Thermal Specifications

.............................................................................................................. 67

6.1

Package Thermal Specifications ........................................................................................ 67

6.1.1 Thermal Specifications .......................................................................................... 67

6.1.2 Thermal Metrology................................................................................................. 71

Processor Thermal Features .............................................................................................. 71

6.2.1 Thermal Monitor..................................................................................................... 71

6.2.2 On-Demand Mode ................................................................................................. 72

6.2.3 PROCHOT# Signal Pin.......................................................................................... 72

6.2.4 FORCEPR# Signal Pin .......................................................................................... 72

6.2.5 THERMTRIP# Signal Pin....................................................................................... 73

6.2.6 TCONTROL and Fan Speed Reduction ................................................................ 73

6.2.7 Thermal Diode ....................................................................................................... 73

Power-On Configuration Options........................................................................................ 75

Clock Control and Low Power States ................................................................................. 75

7.2.1 Normal State.......................................................................................................... 76

7.2.2 HALT Power-Down State....................................................................................... 76

7.2.3 Stop-Grant State.................................................................................................... 76

7.2.4 HALT Snoop State or Snoop State........................................................................ 77

7.2.5 Sleep State ............................................................................................................ 77

Demand-Based Switching (DBS) with Enhanced Intel SpeedStep® Technology .............. 78

6.2

7.0

Features........................................................................................................................................

7.1

7.2

7.3

8.0

Boxed Processor Specifications................................................................................................

8.1

8.2

Introduction ......................................................................................................................... 79

Mechanical Specifications .................................................................................................. 81

8.2.1 Boxed Processor Heatsink Dimensions (CEK)...................................................... 81

8.2.2 Boxed Processor Heatsink Weight ........................................................................ 89

8.2.3 Boxed Processor Retention Mechanism and Heatsink Support (CEK) ................. 89

Electrical Requirements...................................................................................................... 89

8.3.1 Fan Power Supply (active CEK) ............................................................................ 89

Thermal Specifications ....................................................................................................... 92

8.4.1 Boxed Processor Cooling Requirements............................................................... 92

Boxed Processor Contents ................................................................................................. 93

Debug Port System Requirements ..................................................................................... 95

Target System Implementation........................................................................................... 95

9.2.1 System Implementation ......................................................................................... 95

Logic Analyzer Interface (LAI) ........................................................................................... 95

9.3.1 Mechanical Considerations.................................................................................... 96

9.3.2 Electrical Considerations ....................................................................................... 96

8.3

8.4

8.5

9.0

9.1

9.2

9.3

Debug Tools Specifications

....................................................................................................... 95

Datasheet

Intel® Xeon™ Processor with 800 MHz System Bus

Figures

Phase Lock Loop (PLL) Filter Requirements ............................................................................. 15

Intel® Xeon™ Processor with 800 MHz System Bus Load Current vs. Time (VRM 10.0)......... 25

Intel® Xeon™ Processor with 800 MHz System Bus Load Current vs. Time (VRM 10.1)......... 25

VCC Static and Transient Tolerance.......................................................................................... 27

VCC Overshoot Example Waveform .......................................................................................... 28

Processor Package Assembly Sketch........................................................................................ 31

Processor Package Drawing (Sheet 1 of 2) ............................................................................... 32

Processor Package Drawing (Sheet 2 of 2) ............................................................................... 33

Processor Top-Side Markings (Example)................................................................................... 36

Processor Bottom-Side Markings (Example) ............................................................................. 36

Processor Pinout Coordinates, Top View................................................................................... 37

Processor Pinout Coordinates, Bottom View ............................................................................. 38

Intel® Xeon™ Processor with 800 MHz System Bus Thermal Profiles A and B........................ 69

Case Temperature (TCASE) Measurement Location ................................................................ 71

Stop Clock State Machine .......................................................................................................... 76

1U Passive CEK Heatsink.......................................................................................................... 79

2U Passive CEK Heatsink.......................................................................................................... 80

Active CEK Heatsink 3- and 4-Pin (representation only)............................................................ 80

Passive Intel® Xeon™ Processor with 800 MHz System Bus Thermal Solution

(2U and larger) ........................................................................................................................... 81

Top Side Board Keepout Zones (Part 1) .................................................................................... 82

Top Side Board Keepout Zones (Part 2) .................................................................................... 83

Bottom Side Board Keepout Zones............................................................................................ 84

Board Mounting Hole Keepout Zones ........................................................................................ 85

Volumetric Height Keep-Ins........................................................................................................ 86

4-Pin Fan Cable Connector (for active CEK heatsink) ............................................................... 87

4-Pin Baseboard Fan Header (for active CEK heatsink)............................................................ 88

Fan Cable Connector Pinout (3-pin active CEK heatsink) ......................................................... 90

Fan Cable Connector Pinout (4-pin active CEK heatsink) ......................................................... 91

Datasheet

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