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XRT72L54ES-PCI

Description
Network controller and processor IC with t73lc04a+t71d04
Categorysemiconductor    Other integrated circuit (IC)   
File Size2MB,467 Pages
ManufacturerExar [Exar Corporation]
Environmental Compliance
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XRT72L54ES-PCI Overview

Network controller and processor IC with t73lc04a+t71d04

áç
MAY 2001
PRELIMINARY
XRT72L53
REV. P1.1.8
THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
GENERAL DESCRIPTION
The XRT72L53, 3 Channel DS3/E3 Framer IC is de-
signed to accept User Data from the Terminal Equip-
ment and insert this data into the Payload bit-fields
within an Outbound DS3/E3 Data Stream. Further,
the Framer IC is also designed to receive an Inbound
DS3/E3 Data Stream (from the Remote Terminal
Equipment) and extract out the User Data.
The XRT72L53 DS3/E3 Framer device is designed to
support full-duplex data flow between Terminal Equip-
ment and an LIU (Line Interface Unit) IC. The Framer
Device will transmit, receive and process data in the
DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and E3-
ITU-T G.832 (November 1995 and October 1998 Re-
visions) Framing Formats.
The XRT72L53 DS3/E3 Framer IC consists of three
Transmit sections, three Receiver sections, three Per-
formance Monitor Sections and a Microprocessor in-
terface.
The Transmit Sections, include a Transmit Payload
Data Input Interface block, a Transmit Overhead Data
Input Interface block, a Transmit HDLC Controller, a
Transmit DS3/E3 Framer block and a Transmit LIU In-
terface Block which allows the Terminal Equipment to
transmit data to a remote terminal.
The Receive Sections, consist of a Receive LIU Inter-
face, a Receive DS3/E3 Framer, a Receive HDLC
Controller, a Receive Payload Data Output Interface,
and a Receive Overhead Data Interface which allows
F
IGURE
1. B
LOCK
D
IAGRAM OF THE
XRT72L53
the local terminal equipment to receive data from re-
mote terminal equipment.
The Microprocessor Interface is used to configure the
Framer in different operating modes and monitor the
performance of the Framer.
The Performance Monitor Sections consist of a large
number of Reset-upon-Read and Read-Only regis-
ters that contain cumulative and One-Second statis-
tics that reflect the performance/health of the three
channels of the Framer IC/system.
FEATURES
Transmits, Receives and Processes data in the
DS3-C-bit Parity, DS3-M13, E3-ITU-T G.751 and
E3-ITU-T G.832 Framing Formats.
3 Channel HDLC Controller - Tx and Rx
Interfaces to all Popular Microprocessors
Integrated Framer Performance Monitor
Available in a 272 Ball PBGA package
3.3V Power Supply, 5V Tolerant I/O
Operating Temperature -40°C to +85°C
APPLICATIONS
Network Interface Units
CSU/DSU Equipment.
PCM Test Equipment
Fiber Optic Terminals
DS3/E3 Frame Relay Equipment
TestMode
NibbleLnTF
TxOHEnable
TxOHClk
TxOHFrame
TxAISEn
TxOH
TxOHIns
Typical Channel n
Where n = 0, 1 & 2
T3/E3
Transmit
Overhead
Interface
T3/E3 Transmit
Framer
T3/E3
transmit
Input
HDLC
controller
TxOHInd[n:0]
TxNibFrame[n:0]
TxFrame[n:0]
TxNibClk[n:0]
TxLnClk[n:0]
TxFrameRef[n:0]
TxNib[n:0]
TxSer[n:0]
TxLineClk[n:0]
TxPOS[n:0]
TxNEG[n:0]
LIU
Interface/
Controller
T3 FEAC & Data
Link Controller
Performance
Monitor
Interrupt
Controller
uP
Interface
RxLineClk[n:0]
RxPOS[n:0]
RxNEG[n:0]
ExtLOS
A(11:0)
D(7:0)
ALE_AS
WR_R/W
CS
RDY_DTCK
Reset
INT
MOTO
RD_DS
RxOHEnable[n:0]
RxOHClk[n:0]
RxOH[n:0]
RxRed[n:0]
RxOHFrame[n:0]
RxOOF[n:0]
T3/E3
Receive
Overhead
Interface
T3/E3 Receive
Framer
T3/E3
Receive
Output
HDLC
controller
RxClk[n:0]
RxOHind[n:0]
RxFrame[n:0]
RxNib[n:0]
RxSer[n:0]
RxOUTClk[n:0]
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
(510) 668-7000
FAX (510) 668-7017
www.exar.com

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