AND Gate, CMOS, CDIP14
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Objectid | 100752075 |
| package instruction | DIP, DIP14,.3 |
| Reach Compliance Code | unknown |
| kg CO2e/kg | 12.4 |
| Average Weight (mg) | 1630.6 |
| CO2e (mg) | 20219.441 |
| YTEOL | 0 |
| JESD-30 code | R-XDIP-T14 |
| JESD-609 code | e0 |
| Logic integrated circuit type | AND GATE |
| Number of functions | 4 |
| Number of entries | 2 |
| Number of terminals | 14 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| Package body material | CERAMIC |
| encapsulated code | DIP |
| Encapsulate equivalent code | DIP14,.3 |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| propagation delay (tpd) | 14 ns |
| Certification status | Not Qualified |
| Schmitt trigger | NO |
| Maximum supply voltage (Vsup) | 5.5 V |
| Minimum supply voltage (Vsup) | 4.5 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | MILITARY |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 2.54 mm |
| Terminal location | DUAL |
京公网安备 11010802033920号
EEWORLD
