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HV574PG

Description
Serial to parallel logic converter 80v 80ch push-pull
Categorysemiconductor    Discrete semiconductor   
File Size457KB,7 Pages
ManufacturerSupertex
Environmental Compliance
Download Datasheet View All

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HV574PG Overview

Serial to parallel logic converter 80v 80ch push-pull

HV574
100MHz, 80-Channel Serial to Parallel Converter
with Push-Pull Outputs
Features
HVCMOS
®
technology
5.0V CMS Logic
Output voltage up to 80V
Low power level shifting
100MHz equivalent data rate using four dynamic
shift registers
Latched data outputs
Foreward and reverse shifting options (DIR pin)
Diode to VPP allows efficient power recovery
Outputs may be hot switched
Hi-Rel processing available
General Description
The HV574 is a low-voltage serial to high-voltage parallel con-
verter with push-pull outputs. This device has been designed for
use as a driver for printer applications. It can also be used in any
application requiring multiple output high-voltage current sour-
cing and sinking capability such as driving plasma panels, vac-
uum fluorescent displays, or large matrix LCD displays.
The device has 4 parallel 20-bit dynamic shift registers, permitting
data rates 4X the speed of one (they are clocked together). There
are 80 static latches and control logic to perform the polarity
select and blanking of the outputs. HV
OUT
1 is connected to the first
stage of the first shift register through the polarity and blanking
logic. Data is shifted through the shift registers on the logic low
to high transition of the clock. The DIR pin causes CCW shifting
when connected to GND, and CW shifting when connected to
VDD. A data output buffer is provided for cascading devices. This
output reflects the current status of the last bit of the shift register
(HV
OUT
80). Operation of the shift register is not affected by the LE
(latch enable), BL (blanking), or the POL (polarity) inputs. Transfer
of data from the shift registers to the latches occurs when the LE
(latch enable) input is high. The data in the latches is stored when
LE is low.
Functional Block Diagram
VDD
LE
BL
POL
VPP
DIR
D
IN A
20-bit
shift
register
HV
OUT
1
D
OUT A
CLK
HV
OUT
20
HV
OUT
21
D
IN B
20-bit
shift
register
D
OUT B
HV
OUT
40
HV
OUT
41
D
IN C
D
OUT C
20-bit
shift
register
HV
OUT
60
HV
OUT
61
D
IN D
20-bit
shift
register
D
OUT D
HV
OUT
80
GND
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
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