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ISL6520
Data Sheet
April 3, 2007
FN9009.6
Single Synchronous Buck Pulse-Width
Modulation (PWM) Controller
The ISL6520 makes simple work out of implementing a
complete control and protection scheme for a DC/DC
stepdown converter. Designed to drive N-Channel
MOSFETs in a synchronous buck topology, the ISL6520
integrates the control, output adjustment, monitoring and
protection functions into a single 8 Lead package.
The ISL6520 provides simple, single feedback loop, voltage-
mode control with fast transient response. The output
voltage can be precisely regulated to as low as 0.8V, with a
maximum tolerance of
±1.5%
over-temperature and line
voltage variations. A fixed frequency oscillator reduces
design complexity, while balancing typical application cost
and efficiency.
The error amplifier features a 15MHz gain-bandwidth
product and 8V/μs slew rate which enables high converter
bandwidth for fast transient performance. The resulting
PWM duty cycles range from 0% to 100%.
Protection from over-current conditions is provided by
monitoring the r
DS(ON)
of the upper MOSFET to inhibit PWM
operation appropriately. This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor.
Features
• Operates from +5V Input
• 0.8V to V
IN
Output Range
- 0.8V Internal Reference
- ±1.5% Over Line Voltage and Temperature
• Drives N-Channel MOSFETs
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Cycle
• Lossless, Programmable Over-Current Protection
- Uses Upper MOSFET’s r
DS(on)
• Small Converter Size
- 300kHz Fixed Frequency Oscillator
- Internal Soft Start
- 8 Ld SOIC or 16Ld 4mmx4mm QFN
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
• Pb-Free Plus Anneal Available (RoHS Compliant)
Ordering Information
PART
NUMBER
ISL6520CB*
PART
TEMP.
MARKING RANGE (°C)
6520CB
0 to 70
0 to 70
-40 to 85
-40 to 85
0 to 70
0 to 70
-40 to 85
-40 to 85
PACKAGE
8 Ld SOIC
8 Ld SOIC
(Pb-free)
8 Ld SOIC
8 Ld SOIC
(Pb-free)
PKG.
DWG. #
M8.15
M8.15
M8.15
M8.15
Applications
• Power Supplies for Microprocessors
- PCs
- Embedded Controllers
• Subsystem Power Supplies
- PCI/AGP/GTL+ Buses
- ACPI Power Control
• Cable Modems, Set Top Boxes, and DSL Modems
• DSP and Core Communications Processor Supplies
• Memory Supplies
• Personal Computer Peripherals
• Industrial Power Supplies
• 5V-Input DC/DC Regulators
• Low-Voltage Distributed Power Supplies
ISL6520CBZ* 6520 CBZ
(Note)
ISL6520IB*
ISL6520IBZ*
(Note)
ISL6520CR*
6520IB
6520 IBZ
ISL
6520CR
16 Ld 4x4mm QFN L16.4x4
16 Ld 4x4mm QFN L16.4x4
(Pb-free)
16 Ld 4x4mm QFN L16.4x4
16 Ld 4x4mm QFN L16.4x4
(Pb-free)
ISL6520CRZ* 65 20CRZ
(Note)
ISL6520IR*
ISL6520IRZ*
(Note)
ISL 6520IR
65 20IRZ
ISL6520EVAL1
Evaluation Board
* Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2005, 2006, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6520
Pinouts
ISL6520
(8 LD SOIC)
TOP VIEW
BOOT 1
UGATE 2
GND 3
LGATE 4
8 PHASE
7 COMP/SD
6 FB
5 VCC
BOOT 1
UGATE 2
GND 3
NC 4
5
LGATE
6
NC
7
VCC
8
NC
BOOT
UGATE
PHASE
+
0.8V
-
FB
COMP/OCSET
20
μA
OSCILLATOR
FIXED 300kHz
GND
LGATE
ERROR
AMP
+
-
PWM
COMPARATOR
+
-
INHIBIT
GND
ISL6520
(16 LD QFN)
TOP VIEW
PHASE
NC
NC
NC
12 NC
11 COMP/OCSET
10 NC
9 FB
16 15 14 13
Block Diagram
VCC
SAMPLE
AND
HOLD
OC
COMPARATOR
+
-
POR AND
SOFTSTART
GATE
CONTROL
PWM LOGIC
VCC
Typical Application
V
CC
C
DCPL
VCC
R
OCSET
5
ISL6520
COMP/OCSET
7
R
F
C
I
C
F
FB
R
OFFSET
6
3
GND
C
BULK
D
BOOT
1
BOOT
C
BOOT
L
OUT
C
HF
2
8
4
UGATE
PHASE
LGATE
+V
O
C
OUT
R
S
2
FN9009.6
April 3, 2007
ISL6520
Absolute Maximum Ratings
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V
Absolute Boot Voltage, V
BOOT
. . . . . . . . . . . . . . . . . . . . . . . +15.0V
Upper Driver Supply Voltage, V
BOOT
- V
PHASE
. . . . . . . . 7.0V (DC)
8.0V (<10ns Pulse Width, 10μJ)
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance
θ
JA
(°C/W)
θ
JC
(°C/W)
SOIC Package (Note 1) . . . . . . . . . . . . . .
95
N/A
QFN Package (Notes 2, 3). . . . . . . . . . . . .
45
7
Maximum Junction Temperature
(Plastic Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . -65°C to +150°C
Maximum Lead Temperature
(Soldering 10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C
(SOIC - Lead Tips Only)
Recommended Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±10%
Ambient Temperature Range - ISL6520C . . . . . . . . . . 0°C to +70°C
Ambient Temperature Range - ISL6520I . . . . . . . . . .-40°C to +85°C
Junction Temperature Range. . . . . . . . . . . . . . . . . .-40°C to +125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
VCC SUPPLY CURRENT
Nominal Supply
POWER-ON RESET
Rising VCC POR Threshold
VCC POR Threshold Hysteresis
OSCILLATOR
Frequency
Recommended Operating Conditions, Unless Otherwise Noted.
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
VCC
POR
UGATE and LGATE Open
2.6
3.2
3.8
mA
4.19
-
4.30
0.25
4.5
-
V
V
f
OSC
ΔV
OSC
ISL6520C, V
CC
= 5V
ISL6520I, V
CC
= 5V
250
230
-
300
300
1.5
340
340
-
kHz
kHz
V
P-P
%
%
V
Ramp Amplitude
REFERENCE
Reference Voltage Tolerance
ISL6520C
ISL6520I
-1.5
-2.5
-
-
+1.5
+2.5
Nominal Reference Voltage
ERROR AMPLIFIER
DC Gain
Gain-Bandwidth Product
Slew Rate
GATE DRIVERS
Upper Gate Source Current
Upper Gate Sink Current
Lower Gate Source Current
Lower Gate Sink Current
PROTECTION / DISABLE
OCSET Current Source
V
REF
Guaranteed By Design
GBWP
SR
0.800
-
-
-
-
88
15
8
-
-
-
dB
MHz
V/μs
I
UGATE-SRC
I
UGATE-SNK
I
LGATE-SRC
I
LGATE-SNK
I
OCSET
V
DISABLE
ISL6520C
ISL6520I
-
-
-
-
-1
1
-1
2
-
-
-
-
A
A
A
A
μA
μA
V
17
14
-
20
20
0.8
22
24
-
Disable Threshold
3
FN9009.6
April 3, 2007
ISL6520
Functional Pin Description
VCC
This is the main bias supply for the ISL6520, as well as the
lower MOSFET’s gate. Connect a well-decoupled 5V supply
to this pin.
An over-current trip cycles the soft-start function.
During soft-start, and all the time during normal converter
operation, this pin represents the output of the error amplifier.
Use this pin, in combination with the FB pin, to compensate the
voltage-control feedback loop of the converter.
Pulling OCSET to a level below 0.8V will disable the
controller. Disabling the ISL6520 causes the oscillator to
stop, the LGATE and UGATE outputs to be held low, and the
softstart circuitry to re-arm.
FB
This pin is the inverting input of the internal error amplifier. Use
this pin, in combination with the COMP/OCSET pin, to
compensate the voltage-control feedback loop of the converter.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin provides
the PWM-controlled gate drive for the lower MOSFET. This pin
is also monitored by the adaptive shoot-through protection
circuitry to determine when the lower MOSFET has turned off.
Do not insert any circuitry between this pin and the gate of the
lower MOSFET, as it may interfere with the internal adaptive
shoot-through protection circuitry and render it ineffective.
PHASE
Connect this pin to the upper MOSFET source. This pin is
used to monitor the voltage drop across the upper MOSFET
for over-current protection. This pin is also monitored by the
continuously adaptive shoot-through protection circuitry to
determine when the upper MOSFET has turned off.
Functional Description
Initialization
The ISL6520 automatically initializes upon receipt of power.
The Power-On Reset (POR) function continually monitors the
bias voltage at the VCC pin. The POR function initiates the
Over-Current Protection (OCP) sampling and hold operation
after the supply voltage exceeds its POR threshold. Upon
completion of the OCP sampling and hold operation, the POR
function initiates the Soft Start operation.
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive shoot-
through protection circuitry to determine when the upper
MOSFET has turned off. Do not insert any circuitry between
this pin and the gate of the upper MOSFET, as it may
interfere with the internal adaptive shoot-through protection
circuitry and render it ineffective.
Over Current Protection
The over-current function protects the converter from a
shorted output by using the upper MOSFET’s on-resistance,
r
DS(ON)
, to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor
(R
OCSET
) programs the over-current trip level (see See
“Typical Application” on page 2.).
Immediately following POR, the ISL6520 initiates the Over-
Current Protection sampling and hold operation. First, the
internal error amplifier is disabled. This allows an internal
20μA current sink to develop a voltage across R
OCSET
. The
ISL6520 then samples this voltage at the COMP pin. This
sampled voltage, which is referenced to the VCC pin, is held
internally as the Over-Current Set Point.
When the voltage across the upper MOSFET, which is also
referenced to the VCC pin, exceeds the Over-Current Set
Point, the over-current function initiates a soft-start sequence.
Figure 1 shows the inductor current after a fault is introduced
while running at 15A. The continuous fault causes the
ISL6520 to go into a hiccup mode with a typical period of
25ms. The inductor current increases to 18A during the Soft
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-channel MOSFET.
COMP/OCSET
This is a multiplexed pin. During a short period of time following
power-on reset (POR), this pin is used to determine the over-
current threshold of the converter. Connect a resistor (R
OCSET
)
from this pin to the drain of the upper MOSFET (V
CC
).
R
OCSET
, an internal 20μA current source (I
OCSET
), and the
upper MOSFET on-resistance (r
DS(ON)
) set the converter over-
current (OC) trip point according to the following equation:
I
OCSET
xR
OCSET
I
PEAK
= ------------------------------------------------
-
r
DS
(
ON
)
(EQ. 1)
Internal circuitry of the ISL6520 will not recognize a voltage
drop across R
OCSET
larger than 0.5V. Any voltage drop
across R
OCSET
that is greater than 0.5V will set the
overcurrent trip point to:
0.5V
I
PEAK
= ----------------------
r
DS
(
ON
)
(EQ. 2)
4
FN9009.6
April 3, 2007
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