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591BD210M000DG

Description
LVDS Output Clock Oscillator, 210MHz Nom,
CategoryPassive components    oscillator   
File Size416KB,16 Pages
ManufacturerSkyworks
Websitehttp://www.skyworksinc.com
Environmental Compliance
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591BD210M000DG Overview

LVDS Output Clock Oscillator, 210MHz Nom,

591BD210M000DG Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid4037671548
Reach Compliance Codecompliant
YTEOL6.65
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TAPE
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
JESD-609 codee4
Installation featuresSURFACE MOUNT
Nominal operating frequency210 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
Output load100 OHM
physical size7.0mm x 5.0mm x 1.8mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceGOLD OVER NICKEL
S i 5 9 0 / 5 91
1 ps M
AX
J
I T T E R
C
RYSTAL
O
SC ILLA TOR
(XO)
(10 M H
Z TO
810 MH
Z
)
Features
Available with any-frequency output
frequencies from 10 to 810 MHz
3rd generation DSPLL
®
with superior
jitter performance: 1 ps max jitter
Better frequency stability than SAW-
based oscillators
Internal fundamental mode crystal
ensures high reliability
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry Standard 5x7 and
3.2x5 mm packages
Pb-free/RoHS-compliant
–40 to +85 ºC operating
temperature range
Si5602
Applications
Ordering Information:
See page 8.
SONET/SDH (OC-3/12/48)
Networking
SD/HD SDI/3G SDI video
Test and measurement
Storage
FPGA/ASIC clock generation
Description
The Si590/591 XO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry
to provide a low jitter clock at high frequencies. The Si590/591 supports any
frequency from 10 to 810 MHz. Unlike a traditional XO, where a unique
crystal is required for each output frequency, the Si590/591 uses one fixed
crystal to provide a wide range of output frequencies. This IC based
approach allows the crystal resonator to provide exceptional frequency
stability and reliability. In addition, DSPLL clock synthesis provides superior
supply noise rejection, simplifying the task of generating low jitter clocks in
noisy environments typically found in communication systems. The
Si590/591 IC based XO is factory configurable for a wide variety of user
specifications including frequency, supply voltage, output format, and
stability. Specific configurations are factory programmed at time of shipment,
thereby eliminating long lead times associated with custom oscillators.
Pin Assignments:
See page 7.
(Top View)
NC
1
6
V
DD
OE
2
5
CLK–
GND
3
4
CLK+
Si590 (LVDS/LVPECL/CML)
OE
1
6
V
DD
Functional Block Diagram
NC
2
5
NC
V
DD
CLK– CLK+
GND
3
4
CLK
17 k
*
Any-rate
10–810 MHz
DSPLL
®
Clock
Synthesis
Si590 (CMOS)
OE
Fixed
Frequency
XO
OE
1
6
V
DD
NC
2
5
CLK–
17 k
*
GND
3
4
CLK+
GND
*Note: Output Enable High/Low Options Available – See Ordering Information
Si591 (LVDS/LVPECL/CML)
Rev. 1.2 6/18
Copyright © 2018 by Silicon Laboratories
Si590/591
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