CXK5B41020TM
-12
262144-word
×
4-bit High Speed Bi-CMOS Static RAM
Description
CXK5B41020TM is a high speed 1M bit Bi-CMOS
static RAM organized as 262144 words by 4 bits.
Operating on a single 3.3V supply this asynchronous
IC is suitable for use in high speed and low power
applications.
Features
•
•
•
•
Single 3.3V power supply: 3.3V±0.3V
Fast access time
12ns (Max.)
Low standby current:
10mA (Max.)
Low power operation 792mW (Max.)
32 pin TSOP (PIastic)
Function
262144 word
×
4-bit static RAM
Structure
Silicon gate Bi-CMOS IC
•
Package line-up
Dual Vcc/Vss
CXK5B41020TM 400mil 32pin TSOP package
Block Diagram
A16
A17
A10
A9
A14
A15
A12
A11
Buffer
Row
Decoder
Memory
Matrix
256
×
4096
Pin Configuration
(Top View)
NC
Vcc
A3
A2
A1
A0
GND
CE
I/O1
Vcc
1
2
3
4
5
6
7
8
32
A4
31
A5
30
A6
29
A7
28
A8
27
OE
26
I/O4
25
GND
24
Vcc
23
I/O3
22
A9
21
A10
20
A11
19
A12
18
A13
17
NC
Pin Description
Symbol
A0 to A17
I/O1 to I/O4
CE
WE
OE
V
CC
GND
NC
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3V power supply
Ground
No connection
GND
9
A6
A13
A5
A4
A3
A0
A2
A1
A7
A8
I/O Gate
Column
Decoder
I/O2
10
WE
11
A17
12
A16
13
A15
14
A14
15
NC
16
Buffer
WE
OE
CE
I/O Buffer
I/O1 I/O4
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E93726-ST
CXK5B41020TM
Absolute Maximum Ratings
Item
Supply voltage
Input voltage
Input and output voltage
Allowable power dissipaiton
Operating temperature
Storage temperature
Symbol
V
CC
V
IN
V
I/O
P
D
Topr
Tstg
(Ta = 25°C, GND=0V)
Rating
–0.5
∗
1
to +4.6
–0.5
∗
1
to V
CC
+ 0.5
–0.5
∗
1
to V
CC
+ 0.5
1.5
∗
2
0 to +70
–55 to +150
235 • 10
Unit
V
V
V
W
°C
°C
°C • sec
Soldering temperature • time Tsolder
∗
1 Vcc, V
IN
, V
I/O
= –2.0V Min. for pulse width less than 5ns.
∗
2 Air flow
≥
1m/s.
Truth Table
CE
H
L
L
L
OE
×
L
×
H
WE
×
H
L
H
Mode
Not selected
Read
Write
Output disable
I/O1 to I/O4
High Z
Data out
Data in
High Z
Current
I
SB1
, I
SB2
I
CC
I
CC
I
CC
×:
"H" or "L"
Recommended Operating Conditions
Item
Supply voltage
Input high voltage
Input low voltage
Symbol
V
CC
V
IH
V
IL
Min.
3.0
2.0
–0.3
∗
(Ta = 0 to +70°C, GND = 0V)
Typ.
3.3
—
—
Max.
3.6
V
CC
+ 0.3
0.8
Unit
V
V
V
∗
V
IL
=–2.0V Min. for pulse width less than 5ns.
–2–
CXK5B41020TM
Electrical Characteristics
DC Characteristics
Item
Input leakage current
Symbol
I
LI
(Vcc = 3.3V ± 0.3V, GND = 0V, Ta = 0 to +70°C)
Conditions
V
IN
= GND to V
CC
CE = V
IH
or
OE = V
IH
or
WE = V
IL
V
I/O
= GND to V
CC
Cycle: Min.
Duty = 100%
I
OUT
= 0mA
CE = V
IL
V
IN
= V
IH
or V
IL
CE
≥
V
CC
– 0.2V
V
IN
≥
V
CC
– 0.2V or
V
IN
≤
0.2V
Cycle: Min.
Duty = 100%
CE = V
IH
V
IN
= V
IH
or V
IL
I
OH
= –2.0mA
I
OL
= 2.0mA
Min.
–10
Typ.
∗
—
Max
+10
Unit
µA
Output leakage current
I
LO
–10
—
+10
µA
Average operating current
I
CC
—
—
220
mA
I
SB1
Standby current
I
SB2
—
—
10
mA
—
2.4
—
—
—
—
100
—
0.4
mA
V
V
Output high voltage
Output low voltage
∗
Vcc = 3.3V, Ta = 25°C
I/O Capacitance
Item
Input capacitance
I/O capacitance
V
OH
V
OL
(Ta = 25°C, f = 1MHz)
Symbol
C
IN
C
I/O
Conditions
V
IN
= 0V
V
I/O
= 0V
Min.
—
—
Typ.
—
—
Max
5
7
Unit
pF
pF
Note)
This parameter is sampled and is not 100% tested.
AC Characteristics
• AC test condition
(Vcc = 3.3V ± 0.3V, Ta = 0 to +75°C)
Item
Input pulse high level
Input pulse low level
Input rise time
Input fall time
Input and output reference level
Output load conditions
Condition
V
IH
= 3.0V
V
IL
= 0.0V
I/O
Output load (1)
Zo=50Ω
I/O
Output Load (2)∗
1
3.3V
1179Ω
t
r = 2ns
t
f = 2ns
1.4V
Fig. 1
R
L
=50Ω
V
L
=1.4V
5pF∗
2
868Ω
∗1.
t
LZ
, t
OLZ
, t
HZ
, t
OHZ
, t
OW
, t
WHZ
∗2.
Including scope and jig capacitances
Fig. 1
–3–
CXK5B41020TM
• Read cycle
Item
Read cycle time
Address access time
Chip enable access time
Output enable to output valid
Output data hold time
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Chip disable to output in high Z (CE)
Output disable to output in high Z (OE)
Symbol
-12
Min.
12
—
—
—
3
3
0
0
0
Max.
—
12
12
6
—
—
—
6
6
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
t
RC
t
AA
t
CO
t
OE
t
OH
t
LZ
t
OLZ
∗
t
HZ
∗
t
OHZ
∗
∗
Transition is measured ±200mV from steady voltage with specified loading in Fig. 1 1-(2).
This parameter is sampled and is not 100% tested.
• Write cycle
Item
Write cycle time
Address valid to end of write
Chip enable to end of write
Data valid to end of write
Data hold from end of write
Write pulse width
Address set up time
Write recovery time
Output active from lend of write
Write to output in high Z
Symbol
-12
Min.
12
10
10
8
0
10
0
0
4
0
Max.
—
—
—
—
—
—
—
—
—
6
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
t
WC
t
AW
t
CW
t
DW
t
DH
t
WP
t
AS
t
WR
t
OW
∗
t
WHZ
∗
∗
Transition is measured ±200mV from steady voltage with specified loading in Fig. 1 1-(2).
This parameter is sampled and is not 100% tested.
–4–
CXK5B41020TM
Timing Waveform
•
Read cycle (1) : OE=V
IL
, WE=V
IH
t
RC
Address
t
AA
t
OH
Data out
Previous data valid
Data valid
•
Read cycle (2) : WE=V
IH
t
RC
Address
t
AA
CE
t
LZ
t
CO
t
HZ
OE
t
OE
t
OLZ
Data out
High impedance
Data valid
t
OHZ
–5–