DATA SHEET
COMPOUND TRANSISTOR
BA1L3N
on-chip resistor NPN silicon epitaxial transistor
For mid-speed switching
FEATURES
• On-chip bias resistor
(R
1
= 4.7 kΩ, R
2
= 10 kΩ)
• Complementary transistor with BN1L3N
PACKAGE DRAWING (UNIT: mm)
ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
°
Parameter
Collector to base voltage
Collector to emitter voltage
Emitter to base voltage
Collector current (DC)
Collector current (Pulse)
Total power dissipation
Junction temperature
Storage temperature
Symbol
V
CBO
V
CEO
V
EBO
I
C(DC)
I
C(pulse)
*
P
T
T
j
T
stg
Ratings
60
50
5
100
200
250
150
−55
to +150
Unit
V
V
V
mA
mA
mW
°C
°C
* PW
≤
10 ms, duty cycle
≤
50 %
ELECTRICAL CHARACTERISTICS (Ta = 25°C)
°
Parameter
Collector cutoff current
DC current gain
DC current gain
Collector saturation voltage
Low level input voltage
High level input voltage
Input resistance
E-to-B resistance
Turn-on time
Storage time
Turn-off time
Symbol
I
CBO
h
FE1
**
h
FE2
**
V
CE(sat)
**
V
IL
**
V
IH
**
R
1
R
2
t
on
t
stg
t
off
V
CC
= 5 V, R
L
= 1 kΩ
V
I
= 5 V, PW = 2
µ
s
duty cycle≤2 %
Conditions
V
CB
= 50 V, I
E
= 0
V
CE
= 5.0 V, I
C
= 5.0 mA
V
CE
= 5.0 V, I
C
= 50 mA
I
C
= 5.0 mA, I
B
= 0.25 mA
V
CE
= 5.0 V, I
C
= 100
µ
A
V
CE
= 0.2 V, I
C
= 5.0 mA
3.0
3.29
7
35
80
60
230
0.05
0.9
1.5
4.7
10
6.11
13
0.2
5.0
6.0
0.2
0.6
MIN.
TYP.
MAX.
100
80
Unit
nA
−
−
V
V
V
kΩ
kΩ
µ
s
µ
s
µ
s
** PW
≤
350
µ
s, duty cycle
≤
2 %
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D16176EJ1V0DS00 (1st edition)
Date Published April 2002 N CP(K)
Printed in Japan
©
2002
1998
BA1L3N
•
The information in this document is current as of July, 2001. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
•
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written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
•
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third parties by or arising from the use of NEC semiconductor products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
patents, copyrights or other intellectual property rights of NEC or others.
•
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of customer's equipment shall be done under the full
responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
parties arising from the use of these circuits, software and information.
•
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
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redundancy, fire-containment, and anti-failure features.
•
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