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DC1957A

Description
eval board for ltm2892-S
CategoryDevelopment board/suite/development tools   
File Size745KB,6 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Environmental Compliance  
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eval board for ltm2892-S

DEMO MANUAL DC1957A
LTM2892-S
SPI/Digital µModule Isolator
DESCRIPTION
Demonstration circuit 1957A is a serial peripheral inter-
face bus (SPI) or digital μModule isolator featuring the
LTM2892-S. The demo circuit operates from external sup-
ply voltages on V
CC1
, V
L1
, V
CC2
, and V
L2
. It communicates
all necessary signaling across the isolation barrier through
LTC’s Isolator™ μModule
®
technology.
Design files for this circuit board are available at
http://www.linear.com/demo
L,
LT, LTC, LTM, Linear Technology, the Linear logo and μModule are registered trademarks
and Isolator is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
PERFORMANCE SUMMARY
SYMBOL
V
CC1
, V
CC2
V
L1
, V
L2
f
MAX
PARAMETER
Input Supply Range
Logic Supply Range
Maximum Data Rate
Specifications are at T
A
= 25°C
CONDITIONS
MIN
3.0
1.62
INx
OUTx, C
L
= 15pF
SPI Bidirectional Communication
SPI Unidirectional Communication
20
4
8
850
600
50
TYP
MAX
5.5
5.5
UNITS
V
V
MHz
MHz
MHz
V
DC
V
RMS
kV/μs
V
IORM
Maximum Working Insulation Voltage
Common Mode Transient Immunity
GND1 to GND2
OPERATING PRINCIPLES
The LTM2892-S requires two to four external power sup-
plies for operation, one for power and one for the signal
interface, on each side of the isolation barrier. The logic
supplies may be tied to the input supplies. Isolation is
maintained by the separation of GND1 and GND2 where
significant operating voltages and transients can exist
without affecting the operation of the LTM2892-S. The ON1
and/or ON2 pins enable or shut down the LTM2892-S, both
must be driven to their respective logic supply voltage for
proper operation. All SPI or Digital signals are referenced
to the logic supply pins V
L1
or V
L2
.
SPI signaling is typically configured by defining the digital
pins as follows:
Logic Side:
IN1 = SCK(IN), IN2 = SDI(IN), IN3 =
CS(IN)
=
SDOE,
and OUTD = SDO(OUT).
Isolated Side:
OUT1 = SCK(OUT), OUT2 = SDI(OUT),
OUT3 =
CS(OUT),
and IND = SDO(IN).
Reference Figure 1 for schematic representation.
No special precautions are required for low RF emissions.
EMI performance is shown in Figure 2, measured using
a gigahertz transverse electromagnetic (GTEM) cell and
method detailed in IEC 61000-4-20, Testing and Measure-
ment Techniques – Emission and Immunity Testing in
Transverse Electromagnetic Waveguides.
dc1957af
1

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