EEWORLDEEWORLDEEWORLD

Part Number

Search

530AB1252M00BGR

Description
LVPECL Output Clock Oscillator, 1252MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size268KB,15 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance
Download Datasheet Parametric View All

530AB1252M00BGR Overview

LVPECL Output Clock Oscillator, 1252MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530AB1252M00BGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
JESD-609 codee4
Manufacturer's serial number530
Installation featuresSURFACE MOUNT
Nominal operating frequency1252 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.0 7/06
Copyright © 2006 by Silicon Laboratories
Si530/531
Web browser control problem (thank you urgently!)
I want to use the following code to dynamically load a web browser and enter the Baidu page, but only a window with a scroll bar appears, and the web page is not entered, and other operations of the d...
bupt042761 Embedded System
Qingyuefeng Function Introduction——Network Editing Function
[size=10.5pt][font=宋体][size=4] [size=10.5pt][font=宋体][size=4]For a complete PCB project design, the schematic diagram generates a network table first, and then the network table is imported into the P...
tsingyue PCB Design
Zigbee-cc2530 Notes --- Buttons and External Interrupts
Before doing the experiment, let's first understand the basic information of the external interrupts of the 51 core of cc2530. Similarly, we go to the datasheet to find the description of these interr...
Jacktang Wireless Connectivity
FIR filtering of ADC
Introduce a simple filtering method fir filtering uses matlab's fdatool to generate a parameter table to declare a filter sampling sequence. The length of the sequence should be the same as the filter...
ssawee Microcontroller MCU
EEWORLD members midterm exam!
...
liuceone Talking
EEWORLD University ---- Live playback: The most important component of the analog world - Signal chain and power supply: Amplifier special
Live playback: The most important component of the analog world - Signal chain and power supply: Amplifier special session : https://training.eeworld.com.cn/course/27386...
hi5 Integrated technical exchanges

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 602  2840  1295  2847  1555  13  58  27  32  4 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号