LPC1837JET100,551 datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> LPC1837JET100,551

LPC1837JET100,551: DescriptionRISC Microcontroller, 32-Bit, FLASH, CMOS, PBGA100; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，155 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

Download Datasheet Parametric View All

LPC1837JET100,551 Overview

RISC Microcontroller, 32-Bit, FLASH, CMOS, PBGA100

LPC1837JET100,551 Parametric

Parameter Name	Attribute value
Objectid	8363011876
package instruction	TFBGA-100
Reach Compliance Code	unknown
YTEOL	8.08
Has ADC	YES
Address bus width	14
bit size	32
maximum clock frequency	25 MHz
DAC channel	YES
DMA channel	YES
External data bus width	8
JESD-30 code	S-PBGA-B100
length	9 mm
Number of I/O lines	49
Number of terminals	100
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Package shape	SQUARE
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
ROM programmability	FLASH
Maximum seat height	1.2 mm
speed	180 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	9 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

Preview

Download Datasheet

View All

LPC185x/3x/2x/1x

32-bit ARM Cortex-M3 MCU; up to 1 MB flash and 136 kB

SRAM; Ethernet, two High-speed USB, LCD, EMC

Rev. 5.2 — 8 March 2016

Product data sheet

1. General description

The LPC185x/3x/2x/1x are ARM Cortex-M3 based microcontrollers for embedded

applications. The ARM Cortex-M3 is a next generation core that offers system

enhancements such as low power consumption, enhanced debug features, and a high

level of support block integration.

The LPC185x/3x/2x/1x operate at CPU frequencies of up to 180 MHz. The ARM

Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with

separate local instruction and data buses as well as a third bus for peripherals. The ARM

Cortex-M3 CPU also includes an internal prefetch unit that supports speculative

branching.

The LPC185x/3x/2x/1x include up to 1 MB of flash and 136 kB of on-chip SRAM, 16 kB of

EEPROM memory, a quad SPI Flash Interface (SPIFI), a State-configurable Timer/PWM

(SCTimer/PWM) subsystem, two High-speed USB controllers, Ethernet, LCD, an external

memory controller, and multiple digital and analog peripherals.

For additional documentation related to the LPC18xx parts, see

Section 17 “References”.

2. Features and benefits



Processor core



ARM Cortex-M3 processor (version r2p1), running at CPU frequencies of up to

180 MHz.



ARM Cortex-M3 built-in Memory Protection Unit (MPU) supporting eight regions.



ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).



Non-maskable Interrupt (NMI) input.



JTAG and Serial Wire Debug, serial trace, eight breakpoints, and four watch points.



Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.



System tick timer.



On-chip memory



Up to 1 MB on-chip dual bank flash memory with flash accelerator.



16 kB on-chip EEPROM data memory.



136 kB SRAM for code and data use.



Multiple SRAM blocks with separate bus access.



64 kB ROM containing boot code and on-chip software drivers.



64 bit+ 256 bit of One-Time Programmable (OTP) memory for general-purpose

use.



Clock generation unit

Recommended Resources

CF1 (CF2) main circuit

Electronic "Miss Manners" Circuit

Acupoint detector circuit

Design circuit diagram using voltage regulator tube

Light change detector drive relay circuit

555 non-contact control switch circuit

If you are a post-80s person with no house or car, are you willing to have a naked marriage?: On February 9, 2010, a classmate of mine who graduated three years ago "secretly" went back to her hometown with her boyfriend to have a "naked wedding". The wedding was simple. The hero and heroine h...; 小娜 Talking

The first table entry is the address of the top of the stack: Why is the first entry in the stm32 interrupt vector table the top address of the stack? What is its function?...; xinbako stm32/stm8

Ask a question about the routine: [i=s] This post was last edited by dontium on 2015-1-23 13:23 [/i]When I was studying the 2812 routines, I found that if the project was opened directly under ti/tutorial, there would be no warning as...; suaimei Analogue and Mixed Signal

Siemens MC39I card cannot start: My MC39I can start up without a card, but it shuts down automatically within 5 seconds after the card is inserted. Does anyone know why? Is it a power problem? Please give me some advice. It would be ...; lnsbb2008 Embedded System

Alternative models for MSP430F2418/2618?: Is there an alternative to MSP430F2418/2618? I am planning to use MSP430F2418/2618+CC2520 to build a ZigBee network, but MSP430F2418/2618 is hard to buy and very expensive. Is there any alternative?...; yuchenglin Microcontroller MCU

Help with the problem of no tool when creating Tornado: As shown in the picture, the tool option column is blank, but there are options for other BSPs, but only this BSP does not have it. Is there something wrong with the Tornado I installed? Or do we have...; plmxs1314 Embedded System

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components