531HB865M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 531HB865M000DGR

531HB865M000DGR: DescriptionCMOS/TTL Output Clock Oscillator, 865MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531HB865M000DGR Overview

CMOS/TTL Output Clock Oscillator, 865MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531HB865M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	865 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Amplitude modulation and detection circuit

Air conditioner phase sequence protection circuit

Crystal diode-capacitor ten times boost circuit

emergency light flasher

Diamond bridge analog switch circuit diagram

TDA7052 power amplifier circuit

FPGA algorithm help: After learning some FPGA knowledge, I want to start working on algorithms. I want to know which is easier, using language programming or using DSP Builder to implement the algorithm? I learned Verilog...; yuechenping FPGA/CPLD

Looking for high-frequency head (electronic tuner) test software: Everyone, if you want to make a test software for a high-frequency head, or if you want to design a test software for a high-frequency head, please give me some advice. Thank you!...; 轩辕情伤 Test/Measurement

Why Can't EVC 4 Debug CE 5 Devices?: I installed EVC 4 + SP 4, CE 5 SDK, but the debug target in the debug options is only the simulator that comes with the CE5 SDK, but there is no DEVICE option. I don't know why? I also installed PPC 2...; batmanliufan Embedded System

DIY Tool Hunt: This is a DIY sub-section of EEWORLD website created at my request, which aims to help friends who like to do things find DIY tools, or DIY tools to complete certain tasks and work! I hope everyone ca...; DIAG DIY/Open Source Hardware

Start playing ARM today: I used to play around with MCUs, but I can only say that I have one foot in the door and one foot out the door when it comes to ARM. I hope we can all make progress together....; 救火车 ARM Technology

EEWORLD University Hall----Live Replay: TI - RSLK Intelligent Robot Kit: Live replay: TI - RSLK Intelligent Robot Kit : https://training.eeworld.com.cn/course/4870...; hi5 Robotics Development

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components