CS98200 Data Sheet
FEATURES
s
DVD-Video, VCD, VCD 2.0, SVCD, CD, and other
popular standards
s
DVD-Audio including CPPM and Verance
™
watermark protection
s
MPEG-1, MPEG-2, and leading edge MPEG-4 audio
and video decoding
s
Kodak Picture CD
s
Flexible ATAPI or AV bus DVD loader support with
no additional logic
s
Dual 32-bit RISC processors, supported by RTOS,
C/C++ compilers, and source level debuggers
s
32-bit DSP capable of running AC-3, MPEG, DTS,
MP3, WMA, and AAC audio decode algorithms
s
High quality integrated video encoder with six 10-bit
video D/A converters
s
Component (RGB or YUV) or composite & S-Video
output
s
Interlaced (PAL/NTSC) or progressive (480p) output,
with Macrovision
™
copy protection
s
CCIR656 video I/O for video capture, PVR and DVR
type applications, picture-in-picture support
s
IEC60958/937 (S/PDIF) & simultaneous PCM output
s
5.1 downmix, karaoke echo mix, pitch shift, and many
other effects
s
PAL / NTSC transcoding
s
Dual 16550 compatible UARTs
s
ATAPI/ IDE interface for hard disk, audio server, and
Personal Video Recorder (PVR) applications
s
240-pin MQFP package
New Highly-Integrated Processor
for Tomorrow’s DVD Players
and DVD Receivers
OVERVIEW
CS98200 is a highly-integrated processor that provides all
of the audio and video processing functions needed for
the next generation of feature-rich DVD players, DVD
receivers and Internet DVD applications. Tomorrow's
features available today in a single chip solution are
DVD-Audio, MP3, WMA
®
, MPEG-2/4: AAC, Kodak
Picture CD
™
, Dolby Digital
™
, Dolby ProLogic II
™
, and
DTS Digital Surround
™
decoding. It supports most
popular CD formats, DVD navigation, disk control,
video decoding and up to eight channels of audio output.
An extension of Cirrus' CS98000 DVD product line, the
CS98200 integrates six 10-bit video digital-to-analog
converters (DACs) and TV encoding with progressive
scan functionality. Progressive scan video provides high
resolution and eliminates the "flickering" effect present in
traditional video playback. Other features enabled by
this integrated chip include karaoke functionality and
video special effects. Its extended feature set makes it
ideal for your next innovative DVD application … today.
Need to get your product to market quickly? Cirrus'
Total Entertainment platform solutions include DVD
front-end controllers, MPEG encoders, audio DSPs, and
digital power amplifiers … everything you need to
launch your product before the competition. CS98200 is a
Cirrus Total Entertainment Total-E
™
IC solution
specifically designed for consumer entertainment
electronics.
(cont.)
ORDERING INFORMATION:
CS98200-CM
See ordering information legend on
page 60.
Preliminary Product Information
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
OCT ’02
DS581PP2
1
Copyright 2002 Cirrus Logic (All Rights Reserved)
CS98200
Next Generation DVD Processor
OVERVIEW
(cont.)
Here is a summary of the CS98200 features.
formats including ATAPI, ISA, and more
• I/O channel interface supports all DVD loader
protocols
System Characteristics
•
•
•
•
•
•
Dual 32-bit (180 MHz) RISC processors
32-bit DSP processor ~ 180 MIPS
240-pin MQFP package
All I/O pins are 3 V with 5 V tolerance
Advanced 0.18 µ CMOS technology
Low power modes and clock shutoff
Video Processor
• OSD module with multiple regions and
transparencies
• Full screen graphics module, with 16 bit true-color
graphics plane
• High quality video scaling using multi-tap
programmable vertical and horizontal filters
Memory Controller
• Up to 120 MHz SDRAM from 4 MB to 32 MB
• FLASH databus isolated from SDRAM bus to allow
faster SDRAM access
• 32-bit data bus for DRAM, 8-bit data bus for ROM
data flow engine
• Two DMA controllers — local memory based and
direct memory-to-memory
• DMA to/from main RAM into local SRAM
Video Encoder
• Six 10-bit video DAC's, drives 37.5
Ω
load directly
• Progressive (480p) or interlaced PAL (B, D, G, H, I, N,
M, 60) and NTSC mode output
• Component (RBG or YUV) or composite + S-Video
output
• Macrovision
™
7.1 support (interlaced) and
Macrovision
™
1.03 support (progressive)
• Wide-screen signaling support (interlaced and
progressive) and CGMS
• Closed captioning support
MPEG Video Decoder
• DVD, VCD, VCD 2.0 and SVCD
• MPEG-1, MPEG-2, and MPEG-4 simple profile
• Anti-tearing logic controls picture decode and
presentation
• Advanced error concealment hardware
Audio Interface
• 8 channels PCM output at 24-bits/192 kHz output
rate
• 2 channels I2S input at 24-bits/96 kHz
• IEC 60958/61937 capabilities
External Interface
• Serial master/slave ports for controlling DVD device
• ATAPI/IDE interface can also control hard disk
drives for PVR features
• Programmable bidirectional I/O pins
• All pins not used for other functions can be
reassigned as general purpose I/O pins
• Hardware assisted support for infrared remote
devices, such as remote control, infrared keyboard,
mouse, printer, and more
• Programmable parallel host master interface supports
2
Copyright 2002 Cirrus Logic (All Rights Reserved)
DS581PP2
CS98200
Next Generation DVD Processor
BLOCK DIAGRAM
R IS C 0
R IS C 1
DSP
Instruction
C ache
C PU Pipe
D ata
C ache
MA C
Instruction
C ache
C PU Pipe
D ata
C ache
MA C
Instruction
C ache
X,Y D ata
Mem ory
Au d io
In terfa ce
PC M O ut
C PU /MA C
PC M In
SP D IF O ut
D V D L o ad er I/O
S ys tem C o n tro ls
S R AM + C P U IF
D VD C ustom Loader
Parallel/Serial Data
Serial C ontrol
H o s t B u s I/O
Misc.
R egister
Banks
Tim ers
PLL
PLL
PLL
D ata flo w
E n g in e
32 K Byte
Internal
SR A M
Arbiter
+
C ontrol
D MA
Interrupt
AT AP I/G eneric
Parallel Bus Interface
D MA (R d + W r)
FLAS H
M em ory.C ontrol
S ys tem S yn c
N T S C /P AL E n co d er
M P E G 4 V id eo
D ec o d er Ac ce lera to r
D MA (2)t
SR A M Buffer
D ecryption
D igital
Encoding
3 D AC s
3 D AC s
C PU Interface
ALU + logic
V id e o P ro ce ss o r
ST C
Schedule
M P E G D ec o d er
S u b p ic tu re
Line B uffer
Video Mixing
S im p le I/O
VLC
Parser
R AM
Motion
C om p
ID C T
D ual U AR T
PW M S em i-D A C
2-W ire Serial (I C )
3/4 W ire S erial (SP I)
Program m able I/O
Infrared Input
D R AM
C o n tro lle r
2
D ecode
r
Scaler
Main V ideo
Scaling and D isplay
O n Screen D isplay O verlay
Picture in P icture O verlay
V id e o C ap tu re
G rap h ics
FIFO
D ecoder
Line B uffer / F licker F ilter
Main G raphics
SD R A M C ontrol
DS581PP2
Copyright 2002 Cirrus Logic (All Rights Reserved)
3
CS98200
Next Generation DVD Processor
Table of Contents
1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 8
1.1 AC and DC Parametric Specifications ...............................................................................8
1.1.1 Absolute Maximum Rating .................................................................................... 8
1.1.2 Recommended Operating Conditions ...................................................................8
1.1.3 Electrical Characteristics ......................................................................................8
2. TIMINGS .................................................................................................................................. 10
2.1 Timing Diagram Conventions ........................................................................................... 10
2.2 DC Characteristics ........................................................................................................... 11
2.2.1 ATAPI Interface ................................................................................................... 11
2.2.2 DVD Loader Interface ......................................................................................... 12
2.2.3 DVD Serial Interface Timing ................................................................................ 15
2.2.4 SDRAM Interface ................................................................................................ 16
2.2.5 ROM/NVRAM Interface ....................................................................................... 18
2.2.6 Digital Video Output Interface ............................................................................. 20
2.2.7 Video Input Interface ........................................................................................... 21
2.2.8 Audio Input Interface Timing ............................................................................... 22
2.2.9 Audio Output Interface Timing ............................................................................. 23
2.2.10 Miscellaneous Timings ...................................................................................... 24
3. TYPICAL APPLICATION ........................................................................................................ 25
4. CS98200 DEVICE SUMMARY ................................................................................................ 26
4.1 Block Diagram .................................................................................................................. 26
Contacting Cirrus Logic Support
Fo r a ll pro du ct qu estio ns a nd in qu iries con tact a C irrus L og ic S ales R e pre se ntative .
To find on e n ea rest yo u g o to
http://www.cirrus.com /corporate/contacts/sales.cfm
IMPORTANT NOTICE
“Preliminary” product information describes products that are in production, but for which full characterization data is not yet available. “Advance” product information
describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidiaries (“Cirrus” believe that the information contained in
)
this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” wit hout warranty of any kind (express or
implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that info
rmation being relied on is current and complete.
All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement,
and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this infor mation as the basis for manufacture or sale of
any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furni hing this information, Cirrus grants no license,
s
express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights of the infor-
mation contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other
parts of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for
resale.
An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or techno logies described in this material and
controlled under the “Foreign Exchange and Foreign Trade Law” is to be exported or taken out of Japan. An export license and/or quota needs to be obtained from the
competent authorities of the Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign Trade Law and is to be
exported or taken out of the PRC.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR
ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR
USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDE R-
STOOD TO BE FULLY AT THE CUSTOMER'S RISK.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names i n this document may be trademarks or
service marks of their respective owners.
2
Purchase of I
2
C components of Cirrus Logic, Inc., or one of its sublicensed Associated Companies conveys a license under the Phillips I C Patent Rights to use those com-
2
ponents in a standard I C system
. HDCD
®
,
Microsoft
®
and Windows Media Technology
™
are registered trademarks or trademarks of Microsoft, Inc. in the United States and/or other countries.
High Definition Compatible Digital
®
and Pacific Microsonics
™
Inc. are either registered trademarks or trademarks of Pacific Microsonics Inc. in the United States and/or
other countries. HDCD technology provided under license from Pacific Microsonics Inc. This products design (and/or software) is covered by one or more of the following:
5,479,168; 5,638,074; 5,640,161; 5,808,574; 5,838,274; 5,854,600; 5,864,311; 5,872,531 with other patents pending.
Dolby Digital, AC-3, Dolby Pro Logic, Dolby Pro Logic II, Dolby Surround, Surround EX, Virtual Dolby Digital and the “AAC” logo are trademarks and the “Dolby Digital”
logo, “Dolby Digital with Pro Logic II” logo, “Dolby” and the double-”D” symbol are registered trademarks of Dolby Laboratories Licensing Corporation. DTS, DTS Digital
Surround, DTS-ES Extended Surround, DTS Neo:6, and DTS Virtual 5.1 are trademarks and the “DTS”, “DTS-ES”, “DTS Virtual 5.1” logos are registered trademarks of the
Digital Theater Systems Corporation. The “MPEG Logo” is a registered trademark of Philips Electronics N. V. Home THX Cinema and THX are registered trademarks of
Lucasfilm Ltd. Surround EX is a jointly developed technology of THX and Dolby Labs, Inc. AAC (Advanced Audio Coding) is an “MPEG
-2-standard-based” digital audio
compression algorithm (offering up 5.1 discrete decoded channels for this implementation) collaboratively developed by AT&T, the Fraunhofer Institute, Dolby Laborato-
ries, and the Sony Corporation. In regards to the MP3 capable functionality of the CS98XXX Family DSP (via downloading of mp3_49 3xxx_vv.ld and mp3e_493xxx_vv.ld
application codes) the following statements are applicable: “Supply of this product conveys a license for personal, private andnon-commercial use. MPEG Layer III audio
decoding technology licensed from Fraunhofer IIS and THOMSON Multimedia.”
4
Copyright 2002 Cirrus Logic (All Rights Reserved)
DS581PP2
CS98200
Next Generation DVD Processor
5.
6.
7.
8.
4.2 CS98200 Device Details .................................................................................................. 26
4.2.1 RISC-32 Processors ........................................................................................... 26
4.2.2 Powerful 24/32-Bit DSP ...................................................................................... 26
4.2.3 System Controls .................................................................................................. 26
4.2.4 Memory Controller .............................................................................................. 26
4.2.5 Data Flow Engine ................................................................................................ 27
4.2.6 MPEG Video Decoder ......................................................................................... 27
4.2.7 System Synchronization ..................................................................................... 27
4.2.8 Audio Interface .................................................................................................... 27
4.2.9 Video Input .......................................................................................................... 27
4.2.10 External Interface .............................................................................................. 27
4.2.11 Video Processor ................................................................................................ 27
4.2.12 Sub-Picture Processor ...................................................................................... 27
4.2.13 Graphics Engine ............................................................................................... 27
4.2.14 On Screen Display Module ............................................................................... 28
4.2.15 DVD Loader Interface ....................................................................................... 28
4.2.16 CPU Interface and SRAM Controller ................................................................ 28
4.2.17 Host Bus Interface ............................................................................................ 28
4.2.18 Video Encoder .................................................................................................. 28
4.2.19 System Functions ............................................................................................. 28
FUNCTIONAL DESCRIPTION ............................................................................................... 29
5.1 RISC Processor ............................................................................................................... 29
5.2 DSP Processor ................................................................................................................ 29
5.3 Memory Control ............................................................................................................... 29
5.4 Dataflow Control (DMA) ................................................................................................... 29
5.5 System Control Functions ............................................................................................... 29
5.6 DVD/ATAPI Interface ....................................................................................................... 30
5.7 Serial DVD Interface ........................................................................................................ 30
5.8 MPEG Video Decoding .................................................................................................... 30
5.9 Audio Processing ............................................................................................................. 30
5.10 Video Encoder with Progressive Video DACs ............................................................... 32
5.11 Video Input/Output Interface .......................................................................................... 33
5.12 Universal Asynchronous Receiver/Transmitters (UARTs) ............................................. 34
MEMORY MAP ....................................................................................................................... 35
6.1 Processor Memory Map .................................................................................................. 35
240-PIN MQFP PIN DESCRIPTION ....................................................................................... 36
7.1 240-Pin MQFP Pin Layout ............................................................................................... 36
7.2 240-Pin MQFP Pin Summary .......................................................................................... 37
7.3 Pin Configuration Summary ............................................................................................. 37
7.4 Explanation of Pin Types ................................................................................................. 38
7.5 240-Pin MQFP Pin Assignments ..................................................................................... 38
INTERFACE DESCRIPTIONS ................................................................................................ 49
8.1 SDRAM Interface Pins ..................................................................................................... 49
8.2 ROM/NVRAM Interface Pins ........................................................................................... 49
8.3 Video Output Interface Pins ............................................................................................. 50
8.4 Video Input Interface Pins ............................................................................................... 50
8.5 Audio PCM Interface Pins ............................................................................................... 51
8.6 Host Master/ATAPI Interface ........................................................................................... 52
8.7 DVD Loader Interface ...................................................................................................... 53
8.8 DVD Serial Data Interface ............................................................................................... 53
8.9 SPI Interface .................................................................................................................... 54
8.10 General Purpose Input/Output (GPIO) .......................................................................... 54
8.11 UART Interface Pins ...................................................................................................... 55
8.12 I
2
C Interface .................................................................................................................. 55
8.13 Miscellaneous Interface Pins ......................................................................................... 55
Copyright 2002 Cirrus Logic (All Rights Reserved)
5
DS581PP2
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