Crystal oscillator
Epson Toyocom
Product Number (please contact us)
CRYSTAL OSCILLATOR
LOW-JITTER SAW OSCILLATOR
EG-2121CA: Q3805CAx0xxxx00
EG-2102CA: Q3806CA00xxxx00
EG - 2121
/
2102CA
series
•Frequency
range
•Supply
voltage
:
53.125 MHz to 700 MHz
:
2.5 V (EG-2121CA)
:
3.3 V (EG-2102CA)
•Output
:
Differential LV-PECL or LVDS
•Function
:
Output enable(OE)
•External
dimensions
:
7.0 × 5.0 × 1.2 t (mm) Typ.
•Very
low jitter and low phase noise by SAW unit.
Actual size
EG-2121CA
EG-2102CA
Specifications (characteristics)
Item
Output frequency range
Supply voltage
Temperature
range
Storage temperature
Operating temperature
Symbol
f
0
V
CC
T_stg
T_use
f_tol
I
CC
I_dis
SYM
V
OH
V
OL
EG-2121CA
EG-2102CA
EG-2121CA
EG-2102CA
Differential LV-PECL
LVDS
53.125 MHz to
100 MHz to
53.125 MHz to 700 MHz
500 MHz
700 MHz
2.5 V
±0.125
V
3.3 V
±0.3
V
2.5 V
±0.125
V
3.3 V
±0.3
V
-40
°C
to +100
°C
P:0
°C
to +70
°C
,R:-5
°C
to +85
°C
,S:-20
°C
to +70
°C
G:
±
50
×
10
-6
,H:
±100 ×
10
-6
80 mA Max.
100 mA Max.
30 mA Max
45 mA Max.
20 mA Max.
32 mA Max
20 mA Max
30 mA Max.
P:45 % to 55 % P:45 % to 55 % L:45 % to 55 % L:45 % to 55 %
1.55 V Typ.
2.35 V Typ.
-
V
CC
-1.025 V to V
CC
-0.88 V
0.8 V Typ.
1.6 V Typ.
-
V
CC
-1.81 V to V
CC
-1.62 V
-
350 mV Typ. 247 mV to 454 mV
-
50 mV
-
1.25 V Typ. 1.125 V to 1.375 V
-
150 mV
50
Ω
70 % V
CC
Min.
30 % V
CC
Max.
400 ps Max.
10 ms Max.
0.2 ps Typ.
3 ps Typ.
3 ps Typ.
25 ps Typ.
4 ps Typ.
0.05
×
10
-3
UI Typ.
1 ps Max.
±
10
×
10
-6
/ year Max.
100
Ω
Remarks
Please contact us for inquiries regarding available
frequencies.
Store as bare product after unpacking
Please contact us for inquiries about S spec.
P:0
°C
to +70
°C,R:-5 °C
to +85
°C
*1
,S:-20
°C
to +70
°C
Frequency tolerance
Current consumption
Disable current
Symmetry
OE=V
CC
,R
L
=50
Ω
or 100
Ω
OE=GND
f
0
≤350
MHz (at outputs crossing point)
*1
DC characteristics
Differential output, DC characteristics
Output change, DC characteristics
Offset, DC characteristics
Offset change, DC characteristics
LV-PECL: Terminated to V
CC
-2.0 V
LVDS: Connected between OUT to
OUT
OE terminal
OE terminal
Between 20% V
CC
and80%of (V
OH
-V
OL
)
Between 20 %and 80 %of Differential
Output peek to peek voltage
Time at minimum supply voltage to be 0 s
Deterministic Jitter
Random Jitter
σ
(RMS of total distribution)
Peak to Peak
Accumulated Jitter(σ) n=2 to 50000 cycles
Offset frequency: 12 kHz to 20 MHz
Output voltage
V
OD
∆V
OD
V
OS
∆V
OS
R
L
V
IH
V
IL
Output load condition
Output enable input voltage
Output disable input voltage
Rise time / Fall time
Start-up time
t
r
/
t
f
t_str
Jitter
*2
t
DJ
t
RJ
t
RMS
t
acc
t
PJ
t
p-p
Phase Jitter
Frequency aging
*3
f_aging
*1
As per below table.
*2
Based on DTS-2075 Digital timing system made from WAVECREST with jitter analysis software VISI6.
*3
Except:
***A
+
25
°C,First
year,V
CC
=2.5 V,3.3 V
Output mode
Frequency
EG-2121CA
range
EG-2102CA
Symmetry
EG-2121CA
EG-2102CA
Details of frequency tolerance
HP:
±100 ×
10
-6
(0°C to +70°C)
HR:
±100 ×
10
-6
(-5°C to +85°C)
Frequency
tolerance
GP:
±50 ×
10
-6
(0°C to +70°C)
GR:
±50 ×
10
-6
(-5°C to +85°C)
P:Differential LV-PECL
All range
50
±
10 %(
f
0
> 350 MHz)
50
±
5 %(
f
0
≤
350 MHz)
50 ± 5 %
A
*4
N
*5
PHPA
PHPN
PHRA
*6
PHRN
*6
PGPA
*6
PGPN
*6
-
PGRN
*6
D: Differential LV-PECL
f
0
≤
175 MHz
f
0
≤
350 MHz
50
±
2 %
A
*4
DHPA
DHRA
*6
DGPA
*6
-
N
*5
DHPN
DHRN
*6
DGPN
*6
DGRN
*6
L:LVDS
All range
50
±
10 %(f
0
> 350 MHz)
50
±
5 %(f
0
≤
350 MHz)
A
*4
LHPA
LHRA
*6
LGPA
*6
-
N
*5
LHPN
LHRN
*6
LGPN
*6
LGRN
*6
V:LVDS
f
0
≤
175 MHz
50
±
2 %
A
*4
VHPA
VHRA
*6
VGPA
*6
-
N
*5
VHPN
VHRN
*6
VGPN
*6
VGRN
*6
*4
This includes initial frequency tolerance, temperature variation, supply voltage variation, reflow drift, and aging(+25
°C,10
years).
*5
This includes initial frequency tolerance, temperature variation, supply voltage variation, and reflow drift(except aging).
*6
53.125 MHz
≤
f
0
< 100 MHz : Unavailable.
External dimensions
#4
#5
#6
(Unit:mm)
1.1
1.4
Pin map
Pin
Connection
Footprint (Recommended)
1.6
(Unit:mm)
#6
#5
#4
E EG-2121
250.000P
GPA 282A
#1
#2
5.0
±0.2
7.0
±0.2
#3
#3
2.54
#2
5.08
#1
1
2
3
4
5
6
OE
N.C.
GND
OUT
OUT
2.6
V
CC
3.9
2.54
#3 is connected to the cover.
1.2
±0.2
5.08
5.08
To maintain stable operation, provide by-pass capacitor with
more than 0.1
μF
at a location as near as possible to the power
source terminal of the crystal products (between V
CC
- GND).
http://www.epsontoyocom.co.jp
1.5
Renesas Electronics MCUs
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