Burr Brown Products
from Texas Instruments
DAC8801
SLAS403A – NOVEMBER 2004 – REVISED DECEMBER 2004
14-Bit, Serial Input Multiplying Digital-to-Analog Converter
FEATURES
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14-Bit Monotonic
±1
LSB INL
±0.5
LSB DNL
Low Noise: 12 nV/√Hz
Low Power: I
DD
= 2 µA
+2.7 V to +5.5 V Analog Power Supply
2 mA Full-Scale Current
±20%
with V
REF
= 10 V
0.5 µs Settling Time
4-Quadrant Multiplying Reference-Input
Reference Bandwidth: 10 MHz
±10
V Reference Input
Reference Dynamics: -105 THD
3-Wire 50-MHz Serial Interface
Tiny 8-Lead 3 x 3 mm SON and 3 x 5 mm
MSOP Packages
Industry-Standard Pin Configuration
DESCRIPTION
The DAC8801 multiplying digital-to-analog converter
is designed to operate from a single 2.7-V to 5.5-V
supply.
The applied external reference input voltage V
REF
determines the full-scale output current. An internal
feedback resistor (R
FB
) provides temperature tracking
for the full-scale output when combined with an
external I-to-V precision amplifier.
A serial-data interface offers high-speed, three-wire
microcontroller compatible inputs using data-in (SDI),
clock (CLK), and chip select (CS).
The DAC8801 is packaged in space-saving 8-lead
SON and MSOP packages.
DAC8801
V
DD
V
REF
D/A
Converter
14
CS
DAC
Register
14
CLK
SDI
Shift
Register
R
FB
I
OUT
APPLICATIONS
Automatic Test Equipment
Instrumentation
Digitally Controlled Calibration
Industrial Control PLCs
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004, Texas Instruments Incorporated
DAC8801
SLAS403A – NOVEMBER 2004 – REVISED DECEMBER 2004
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION
MINIMUM
RELATIVE
ACCURACY
(LSB)
±1
±1
±1
±1
DIFFERENTIAL
NONLINEARITY
(LSB)
±0.5
±0.5
±0.5
±0.5
PACKAGE-
LEAD
MSOP-8
MSOP-8
SON-8
SON-8
PACKAGE
DESIGNATOR
DGK
DGK
DRB
DRB
SPECIFIED
TEMPERATURE
RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
(1)
PRODUCT
DAC8801
DAC8801
DAC8801
DAC8801
PACKAGE
MARKING
F01
F01
E01
E01
ORDERING
NUMBER
DAC8801IDGKT
DAC8801IDGKR
DAC8801IDRBT
DAC8801IDRBR
TRANSPORT
MEDIA,
QUANTITY
Tape and Reel,
250
Tape and Reel,
2500
Tape and Reel,
250
Tape and Reel,
2500
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or refer to our
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
DAC8801
V
DD
to GND
Digital Input voltage to GND
V
OUT
to GND
Operating temperature range
Storage temperature range
Junction temperature range (T
J
max)
Power dissipation
Thermal impedance, R
ΘJA
Lead temperature, soldering
Lead temperature, soldering
ESD rating, HBM
ESD rating, CDM
(1)
Vapor phase (60s)
Infrared (15s)
-0.3 to +7
-0.3 to +V
DD
+ 0.3
-0.3 to +V
DD
+ 0.3
-40 to +105
-65 to +150
+125
(T
J
max - T
A
) / R
ΘJA
+55
+215
+220
1500
1000
UNITS
V
V
V
°C
°C
°C
W
°C/W
°C
°C
V
V
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may affect device reliability.
2
DAC8801
www.ti.com
SLAS403A – NOVEMBER 2004 – REVISED DECEMBER 2004
ELECTRICAL CHARACTERISTICS
V
DD
= +2.7 V to +5.5 V; I
OUT
= Virtual GND, GND = 0 V; V
REF
= 10 V; T
A
= Full Operating Temperature; all specifications
-40°C to +85°C unless otherwise noted.
DAC8801
PARAMETER
STATIC PERFORMANCE
Resolution
Relative accuracy
Differential nonlinearity
Output leakage current
Output leakage current
Full-scale gain error
Full-scale tempco
OUTPUT CHARACTERISTICS
(1)
Output current
Output capacitance
REFERENCE INPUT
VREF Range
Input resistance
Input capacitance
LOGIC INPUTS AND OUTPUT
(1)
Input low voltage
Input low voltage
Input high voltage
Input high voltage
Input leakage current
Input capacitance
INTERFACE TIMING
Clock input frequency
Clock pulse width high
Clock pulse width low
CS to Clock setup time
Clock to CS hold time
Data setup time
Data hold time
POWER REQUIREMENTS
V
DD
I
DD
(normal operation)
V
DD
= +4.5V to +5.5V
V
DD
= +2.7V to +3.6V
AC CHARACTERISTICS
Output voltage settling time
Reference multiplying BW
DAC glitch impulse
Feedthrough error
Digital feedthrough
Total harmonic distortion
Output spot noise voltage
(1)
100Hz to 20kHz
f = 1 kHz, BW = 1 Hz
V
REF
= 5 V
PP
, Data = 3FFFh
V
REF
= 0 V, Data = 3FFFh to 2000h
V
REF
= 100 mV
RMS
, 100kHz, Data = 0000h
0.5
10
2
-70
2
-105
12
µs
MHz
nV/s
dB
nV/s
dB
nV/√Hz
Logic inputs = 0 V
V
IH
= V
DD
and V
IL
= GND
V
IH
= V
DD
and V
IL
= GND
3
1
2.7
5.5
5
5
2.5
V
µA
µA
µA
f
CLK
10
10
0
10
5
10
50
MHz
ns
ns
ns
ns
ns
ns
V
IL
V
DD
= +2.7V
V
IL
V
DD
= +5V
V
IH
V
DD
= +2.7V
V
IH
V
DD
= +5V
I
IL
C
IL
2.1
2.4
10
10
0.6
0.8
V
V
V
V
µA
pF
-15
5
5
15
V
kΩ
pF
Code dependent
2
50
mA
pF
Data = 0000h, T
A
= 25°C
Data = 0000h, T
A
= T
MAX
All ones loaded to DAC register
±1
±3
14
±1
±0.5
10
10
±4
Bits
LSB
LSB
nA
nA
mV
ppm of FSR/°C
CONDITIONS
MIN
TYP
MAX
UNITS
Specified by design and characterization, not production tested.
3
DAC8801
SLAS403A – NOVEMBER 2004 – REVISED DECEMBER 2004
www.ti.com
PIN ASSIGNMENTS
DRB PACKAGE
(TOP VIEW)
DGK PACKAGE
(TOP VIEW)
CLK
SDI
R
FB
V
REF
1
2
3
4
8
7
6
5
CS
V
DD
GND
I
OUT
CLK
SDI
R
FB
V
REF
1
2
3
4
8
7
6
5
CS
V
DD
GND
I
OUT
TERMINAL FUNCTIONS
PIN
1
2
3
4
5
6
7
8
NAME
CLK
SDI
R
FB
V
REF
I
OUT
GND
V
DD
CS
DESCRIPTION
Clock input, positive edge triggered clocks data into shift register
Serial register input, data loads directly into the shift register MSB first. Extra leading
bits are ignored.
Internal matching feedback resistor. Connect to external op amp output.
DAC reference input pin. Establishes DAC full-scale voltage. Constant input resistance
versus code.
DAC current output. Connects to inverting terminal of external precision I to V op amp.
Analog and digital ground
Posiitve power supply input. Specified range of operation 2.7 V to 5.5 V.
Chip select, active low digital input. Transfers shift register data to DAC register on
rising edge. See Table 1 for operation.
4
DAC8801
www.ti.com
SLAS403A – NOVEMBER 2004 – REVISED DECEMBER 2004
TYPICAL CHARACTERISTICS: V
DD
= +5 V
At T
A
= +25°C, +V
DD
= +5 V, unless otherwise noted.
LINEARITY ERROR
vs DIGITAL INPUT CODE
1.0
0.8
0.6
0.4
INL (LSB)
0.2
0
−0.2
−0.4
−0.6
−0.8
−1.0
0
2048
4096
6144 8192 10240 12288 14336 16384
Digital Input Code
DNL (LSB)
T
A
= +25_ C
1.0
0.8
0.6
0.4
0.2
0
−0.2
−0.4
−0.6
−0.8
−1.0
0
2048
4096
6144 8192 10240 12288 14336 16384
Digital Input Code
T
A
= +25_ C
DIFFERENTIAL LINEARITY ERROR
vs DIGITAL INPUT CODE
Figure 1.
LINEARITY ERROR
vs DIGITAL INPUT CODE
1.0
0.8
0.6
0.4
INL (LSB)
0.2
0
−0.2
−
0.4
−0.6
−
0.8
−1.0
0
2048
4096
6144
8192 10240 12288 14336 16384
Digital Input Code
DNL (LSB)
T
A
=
−40_C
1.0
0.8
0.6
0.4
0.2
0
−
0.2
−0.4
−
0.6
−0.8
−
1.0
0
2048
4096
Figure 2.
DIFFERENTIAL LINEARITY ERROR
vs DIGITAL INPUT CODE
T
A
=
−
40
_
C
6144 8192 10240 12288 14336 16384
Digital Input Code
Figure 3.
LINEARITY ERROR
vs DIGITAL INPUT CODE
1.0
0.8
0.6
0.4
INL (LSB)
0.2
0
−0.2
−
0.4
−0.6
−
0.8
−1.0
0
2048
4096
6144
8192 10240 12288 14336 16384
Digital Input Code
DNL (LSB)
T
A
= +85_ C
1.0
0.8
0.6
0.4
0.2
0
−
0.2
−0.4
−
0.6
−0.8
−
1.0
0
2048
4096
Figure 4.
DIFFERENTIAL LINEARITY ERROR
vs DIGITAL INPUT CODE
T
A
= +85
_
C
6144 8192 10240 12288 14336 16384
Digital Input Code
Figure 5.
Figure 6.
5
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