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DG188AP/883B

Description
1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP14
CategoryAnalog mixed-signal IC    The signal circuit   
File Size75KB,9 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
Download Datasheet Parametric View All

DG188AP/883B Overview

1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP14

DG188AP/883B Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Objectid1437155387
Parts packaging codeDIP
package instructionDIP, DIP14,.3
Contacts14
Reach Compliance Codenot_compliant
Analog Integrated Circuits - Other TypesSPDT
JESD-30 codeR-CDIP-T14
JESD-609 codee0
Nominal Negative Supply Voltage (Vsup)-15 V
Number of channels1
Number of functions1
Number of terminals14
Nominal off-state isolation50 dB
Maximum on-state resistance (Ron)75 Ω
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
power supply+-15 V
Certification statusNot Qualified
Nominal supply voltage (Vsup)15 V
surface mountNO
Maximum disconnect time130 ns
Maximum connection time250 ns
switchBREAK-BEFORE-MAKE
technologyJFET
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Semiconductor
DG181 thru DG191
High-Speed Drivers with JFET Switch
Description
The DG181 thru DG191 series of analog gates consist of 2
or 4 N-channel junction-type field-effect transistors (JFET)
designed to function as electronic switches. Level-shifting
drivers enable low-level inputs (0.8V to 2V) to control the
ON-OFF state of each switch. The driver is designed to
provide a turn-off speed which is faster than turn-on speed,
so that break-before-make action is achieved when
switching from one channel to another. In the ON state, each
switch conducts current equally well in both directions. In the
OFF condition, the switches will block voltages up to 20V
peak-to-peak. Switch-OFF input-output isolation 50dB at
10MHz, due to the low output impedance of the FET-gate
driving circuit.
T
UCT
ROD RODUC
P
5
LETE
TE P
April 1999
BSO BSTITU 9, HI-5041
O
SU
515
504
IBLE 185: HI--5051, IHH5043
S
POS
DG
0, I
, HI
184,: DG403 , HI-039
Features
DG 90
43
DG1 91: HI-50
• Constant ON-Resistance for Signals to
±10V
(DG182,
DG1
DG185, DG188, DG191), to
±7.5V
(All Devices)
±15V
Power Supplies
• <2nA Leakage from Signal Channel in Both ON and
OFF States
• TTL, DTL, RTL Direct Drive Compatibility
• t
ON
, t
OFF
<150ns, Break-Before-Make Action
• Cross-Talk and Open Switch Isolation >50dB at 10MHz
(75Ω Load)
Functional Diagrams (Typical Channel)
DG186, DG187, DG188 - ONE AND TWO CHANNEL
SPDT AND SPST CIRCUIT CONFIGURATION
V
L
V+
DG183, DG184, DG185 - TWO CHANNEL DPST
CIRCUIT CONFIGURATION
V
L
V+
IN
S
1
D
1
IN
S
D
S
2
D
2
S
D
GND
V-
GND
V-
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
©
Harris Corporation 1999
File Number
3114.4
1
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