DG200A
Monolithic Dual SPST CMOS Analog Switch
Features
D
D
D
D
"15
V Input Signal Range
44-V Maximum Supply Ranges
On-Resistance: 45
W
TTL and CMOS Compatibility
Benefits
D
Wide Dynamic Range
D
Simple Interfacing
D
Reduced External Component Count
Applications
D
D
D
D
Servo Control Switching
Programmable Gain Amplifiers
Audio Switching
Programmable Filters
Description
The DG200A is a dual, single-pole, single-throw analog
switch designed to provide general purpose switching of
analog signals. This device is ideally suited for designs
requiring a wide analog voltage range coupled with low
on-resistance.
The DG200A is designed on Siliconix’ improved PLUS-40
CMOS process. An epitaxial layer prevents latchup.
Each switch conducts equally well in both directions when
on, and blocks up to 30 V peak-to-peak when off. In the on
condition, this bi-directional switch introduces no offset
voltage of its own.
Functional Block Diagram and Pin Configuration
Dual-In-Line
IN
2
NC
GND
NC
S
2
D
2
V–
1
2
3
4
5
6
7
Top View
14
13
12
11
10
9
8
IN
1
NC
V+ Substrate
NC
S
1
D
1
NC
GND
IN
2
2
3
4
S
2
5
6
V–
IN
1
1
Metal Can
V+ (Substrate and Case)
10
S
1
9
8
7
D
1
NC
D
2
Top View
Truth Table
Logic
0
1
Logic “0”
v
0.8 V
g
Logic
L i “1”
w
2.4 V
24
Switch
ON
OFF
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70035.
Siliconix
S-52880—Rev. B, 28-Apr-97
1
DG200A
Ordering Information
Temp Range
0 to 70_C
–25 to 85_C
Package
14-Pin Plastic DIP
14-Pin CerDIP
10-Pin Metal Can
Part Number
DG200ACJ
DG200ABK
DG200ABA
DG200AAK
14-Pin CerDIP
–55 to 125_C
10-Pin Metal Can
14-Pin Sidebraze
DG200AAK/883,
JM38510/12301BCA
DG200AAA
DG200AAA/883,
JM38510/12301BIC
JM38510/12301BCC
Absolute Maximum Ratings
V+ to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
GND to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
Digital Inputs
a
, V
S
, V
D
. . . . . . . . . . . . . . . . (V–) –2 V to (V+) +2 V or
30 mA, whichever occurs first
Current (Any Terminal) Continuous . . . . . . . . . . . . . . . . . . . . . . 30 mA
Current S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) . . . . . . . . . . . . . . . . . . . 100 mA
Storage Temperature
(AX, BX Suffix) . . . . . . . . . . –65 to 150_C
(CJ Suffix) . . . . . . . . . . . . . . . –65 to 125_C
Power Dissipation (Package)
b
10-Pin Metal Can
c
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
14-Pin CerDIP
d
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825 mW
14-Pin Plastic DIP
e
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
Notes:
a. Signals on S
X
, D
X
, or IN
X
exceeding V+ or V– will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/_C above 75_C
d. Derate 11 mW/_C above 75_C
e. Derate 6.5 mW/_C above 25_C
Schematic Diagram (Typical Channel)
V+
S
V–
–
+
V+
GND
IN
X
D
V–
Figure 1.
2
Siliconix
S-52880—Rev. B, 28-Apr-97
DG200A
Specifications
a
Test Conditions
Unless Otherwise Specified
Parameter
Analog Switch
Analog Signal Range
e
Drain-Source
On-Resistance
Source Off
Leakage Current
Drain Off
Leakage Current
Channel On
Leakage Current
f
V
ANALOG
r
DS(on)
I
S(off)
I
D(off)
I
D(on)
V
D
=
"10
V, I
S
= –1 mA
V
S
=
"14
V, V
D
=
#14
V
V
D
=
"14
V, V
S
=
#14
V
V
S
= V
D
=
"14
V
Full
Room
Full
Room
Full
Room
Full
Room
Full
45
–2
–100
–2
–100
–2
–200
–15
15
70
100
2
100
2
100
2
200
–5
–100
–5
–100
–5
–200
–15
15
80
100
5
100
5
100
5
200
nA
V
W
A Suffix
–55 to 125_C
B, C Suffix
Min
d
Max
d
Symbol
V = 15 V, V– = –15 V
VV
15
V+
V
IN
= 2.4 V, 0.8 V
f
Temp
b
Typ
c
Min
d
Max
d
Unit
"0.01
"0.01
"0.1
Digital Control
V
IN
= 2.4 V
I
INH
V
IN
= 15 V
Input Current with
Input Voltage Low
I
INL
V
IN
= 0 V
Room
Full
Room
Full
Room
Full
0.0009
0.005
–0.0015
–0.5
–1
–0.5
–1
0.5
1
–1
–10
–1
–10
1
10
mA
Input Current with
p
I
Input V l
Voltage Hi h
High
Dynamic Characteristics
Turn-On Time
Turn-Off Time
Charge Injection
Source-Off Capacitance
Drain-Off Capacitance
Channel-On Capacitance
Off Isolation
Crosstalk
(Channel-to-Channel)
t
ON
t
OFF
Q
C
S(off)
C
D(off)
C
D(on)
+
C
S(On)
OIRR
X
TALK
Room
See Switching Time Test Circuit
C
L
= 1000 pF, V
g
= 0 V
R
g
= 0
W
f = 140 kHz
V
IN
= 5 V
V
S
= 0 V
V
D
= 0 V
Room
Room
Room
Room
Room
Room
Room
440
340
–10
9
9
25
75
90
dB
pF
1000
425
1000
425
ns
pC
V
D
= V
S
= 0 V, V
IN
= 0 V
V
IN
= 5 V R
L
= 75
W
V,
V
S
= 2 V, f = 1 MHz
Power Supplies
Positive Supply Current
Negative Supply Current
I+
I–
Both Channels On or Off
V
IN
= 0 V and 2 4 V
d 2.4
Room
Room
0.8
–0.23
–1
2
–1
2
mA
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is aminimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. V
IN
= input voltage to perform proper function.
Siliconix
S-52880—Rev. B, 28-Apr-97
3
DG200A
Typical Characteristics
r
DS(on)
vs. V
D
and Power Supply Voltage
+6
120
A:
B:
C:
D:
E:
"5
V
"10
V
"12
V
"15
V
"20
V
T
A
= 25_C
0
A
I
S
, I
D
(pA)
–6
I
D(on)
I
D(off)
or I
S(off)
Leakage Currents vs. Analog Voltage
100
r
DS(on)
(
W
)
80
B
60
C
D
40
E
–12
–18
20
–15 –12 –9
–6
–3
0
3
6
9
12 15
V
D
– Drain Voltage (V)
–24
–15 –12 –9
–6
–3
0
3
6
9
12 15
V
ANALOG
– Analog Voltage (V)
Input Switching Threshold vs. V+ and V– Supply Voltages
2.5
Supply Currents vs. Toggle Frequency
2.0
V
T
(V)
1.5
1.0
0.5
0
0
"5
V+, V– Positive and Negative Supplies (V)
4
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
"10
"15
"20
6
5
I+, I– (mA)
4
3
2
V+ = 15 V
V– = –15 V
Both logic inputs
toggled simutaneously
I+
1
I–
0
1k
10 k
100 k
1M
Toggle Frequency (Hz)
Siliconix
S-52880—Rev. B, 28-Apr-97
DG200A
Test Circuits
V
O
is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
+15 V
Logic
Input
Switch
Input
Switch
Output
3V
50%
0V
t
OFF
V
S
90%
V
O
t
ON
3V
GND
t
r
<20 ns
t
f
<20 ns
V
S
= +5 V
S
IN
V+
D
V
O
R
L
1 kW
C
L
35 pF
V–
–15 V
V
O
= V
S
R
L
R
L
+ r
DS(on)
Figure 2.
Switching Time
+15 V
DV
O
R
g
V+
S
IN
3V
GND
V–
DV
O
= measured voltage error due to charge injection
The charge injection in coulombs is
DQ
= C
L
x
DV
O
–15 V
D
V
O
C
L
1000 pF
IN
X
ON
OFF
ON
V
O
V
g
Figure 3.
Charge Injection
C
+15 V
C
V+
+15 V
V+
V
S
S
D
V
O
R
L
GND
V–
C
R
g
= 50
W
0V
S
1
IN
1
S
2
IN
2
GND
–15 V
–15 V
Off Isolation = 20 log
V
S
V
O
X
TALK
= 20 log
C = RF bypass
V
S
V
O
V–
C
D
2
D
1
50
W
V
O
R
L
V
S
R
g
= 50
W
5V
IN
NC
0V
Figure 4.
Off Isolation
Figure 5.
Channel-to-Channel Crosstalk
Siliconix
S-52880—Rev. B, 28-Apr-97
5
Embedded System
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