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1812K1000393MXTE03

Description
Feed Through Capacitor, 2 Function(s), 100V, EIA STD PACKAGE SIZE 1812
CategoryAnalog mixed-signal IC    filter   
File Size175KB,4 Pages
ManufacturerSyfer
Download Datasheet Parametric View All

1812K1000393MXTE03 Overview

Feed Through Capacitor, 2 Function(s), 100V, EIA STD PACKAGE SIZE 1812

1812K1000393MXTE03 Parametric

Parameter NameAttribute value
Reach Compliance Codecompli
ECCN codeEAR99
Other featuresFLEXICAP TERMINATION
capacitance39000 µF
filter typeFEED THROUGH CAPACITOR
high2 mm
Minimum insulation resistance10000 MΩ
JESD-609 codee3
length4.5 mm
Manufacturer's serial numberX2Y
Installation typeSURFACE MOUNT
Number of functions2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
method of packingREEL
physical sizeL4.5XB3.2XH2.0 (mm)/L0.177XB0.126XH0.079 (inch)
Rated voltage100 V
Terminal surfaceMATTE TIN
width3.2 mm
Base Number Matches1
Integrated
Passive Components
Balanced Line EMI Chip
X2Y
The Syfer Balanced Line Chip is a 3 terminal EMI chip device. The
revolutionary design provides simultaneous line-to-line and line-to-
ground filtering, using a single ceramic chip. In this way, differential
and common mode filtering are provided in one device. Capable of
replacing 2 or more conventional devices, it is ideal for balanced lines,
twisted pairs and dc motors, in automotive, audio, sensor and other
applications.
These filters can prove invaluable in meeting stringent EMC demands
particularly in automotive applications.
Specifications
Dielectric
Electrical Configuration
Capacitance Measurement
Typical Capacitance Matching
Temperature Rating
Dielectric Withstand Volage
Insulation Resistance
Termination Material
X7R or C0G/NP0
Multiple capacitance
At 1000hr point
Better than 5%
-55°C to 125°C
2.5 x Rated Volts for 5 secs.
Charging current limited to 50mA Max.
100Gohms or 1000s (whichever is the less)
100% matte tin over nickel
L
T
Advantages
Replaces 2 or 3 capacitors with one device
Matched capacitance line to ground on both lines
Low inductance due to cancellation effect
Capacitance line to line
Differential and common mode attenuation
Effects of temperature and voltage variation eliminated
Effect of ageing equal on both lines
High current capability
W
L1
L2
INPUT 1
A
C1
GROUND
C1
C2
A
Applications
Balanced lines
Twisted pairs
EMI Suppression on DC motors
Sensor/transducer applications
Wireless communications
Audio
INPUT 2
B
B
Chip
Size
0603*
0805
1206
1410
1812
2220
L
1.6±0.2 (0.063±0.008)
2.0±0.3 (0.08±0.012)
3.2±0.3 (0.126±0.012)
3.6±0.3 (0.14±0.012)
4.5±0.35 (0.18±0.014)
5.7±0.4 (0.22±0.016)
W
0.8±0.2 (0.03±0.008)
1.25±0.2 (0.05±0.008)
1.60±0.2 (0.063±0.008)
2.5±0.3 (0.1±0.012)
3.2±0.3 (0.126±0.012)
5.0±0.4 (0.2±0.016)
T
0.5±0.15 (0.02±0.006)
1.0±0.15 (0.04±0.006)
1.1±0.2 (0.043±0.008)
2 max. (0.08 max.)
2 max. (0.08 max.)
2.5 max. (0.1 max.)
L1
0.3±0.2 (0.012±0.008)
0.5±0.25 (0.02±0.01)
0.95±0.3 (0.037±0.012)
1.20±0.3 (0.047±0.012)
1.5±0.35 (0.06±0.014)
2.25±0.4 (0.09±0.016)
L2
0.2±0.1 (0.008±0.004)
0.3±0.15 (0.012±0.006)
0.5±0.25 (0.02±0.01)
0.5±0.25 (0.02±0.01)
0.5±0.25 (0.02±0.01)
0.75±0.25 (0.03±0.01)
Recommended Solder Lands
Insertion Loss Characteristics (common mode)
Typical 50 ohm system
80
220nF
4.7nF
2.2nF
1nF
470pF
220pF
100pF
47pF
22pF
B
C
A
Insertion Loss (dB)
60
100nF
47nF
22nF
D
40
10nF
Chip Size
0603*
0805
1206
1410
1812
2220
A
0.6 (0.024)
0.95 (0.037)
1.2 (0.047)
2.05 (0.08)
2.65 (0.104)
4.15 (0.163)
Dimensions mm (inches)
B
C
D
0.6 (0.024) 0.4 (0.016) 0.2 (0.008)
0.9 (0.035) 0.3 (0.012) 0.4 (0.016)
0.9 (0.035) 0.6 (0.024) 0.8 (0.03)
1.0 (0.04) 0.7 (0.028) 0.9 (0.035)
1.4 (0.055) 0.8 (0.03) 1.4 (0.055)
1.4 (0.055) 1.2 (0.047) 1.8 (0.071)
20
0
0.1
1
10
100
1000
Frequency (MHz)
*
The 0603 chip size is a development item. All technical information should
be considered provisional and subject to change. Refer to Sales office.
FILTSMX2Y.ver2
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