5962R9664201VEC datasheet, PDF

5962R9664201VEC: Description4000/14000/40000 SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16; Categorylogic logic; File Size366KB，11 Pages; ManufacturerIntersil ( Renesas ); Websitehttp://www.intersil.com/cda/home/

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5962R9664201VEC Overview

4000/14000/40000 SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16

Parameter Name	Attribute value
Objectid	1532326153
Parts packaging code	DIP
package instruction	DIP, DIP16,.3
Contacts	16
Reach Compliance Code	unknown
YTEOL	0
Other features	PARALLEL OUTPUT IS LATCHED; UNLATCHED SERIAL SHIFT RIGHT OUTPUT
Counting direction	RIGHT
series	4000/14000/40000
JESD-30 code	R-CDIP-T16
JESD-609 code	e4
length	19.05 mm
Logic integrated circuit type	SERIAL IN PARALLEL OUT
Maximum Frequency@Nom-Sup	930000 Hz
Number of digits	8
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
propagation delay (tpd)	1134 ns
Certification status	Not Qualified
Filter level	MIL-PRF-38535 Class V
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	18 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
total dose	100k Rad(Si) V
Trigger type	POSITIVE EDGE
width	7.62 mm
minfmax	1.25 MHz

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