MT41K1G8TRF-125:E datasheet, PDF

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MT41K1G8TRF-125:E: DescriptionDDR DRAM, 1GX8, 0.225ns, CMOS, PBGA78, 9.50 X 11.50 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-78; Categorystorage storage; File Size313KB，13 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT41K1G8TRF-125:E Overview

DDR DRAM, 1GX8, 0.225ns, CMOS, PBGA78, 9.50 X 11.50 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-78

MT41K1G8TRF-125:E Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Micron Technology
package instruction	TFBGA, BGA78,9X13,32
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.225 ns
Other features	SELF REFRESH
Maximum clock frequency (fCLK)	800 MHz
I/O type	COMMON
interleaved burst length	8
JESD-30 code	R-PBGA-B78
JESD-609 code	e0
length	11.5 mm
memory density	8589934592 bit
Memory IC Type	DDR DRAM
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	78
word count	1073741824 words
character code	1000000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	1GX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA78,9X13,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	235
power supply	1.35 V
Certification status	Not Qualified
refresh cycle	8192
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	8
Maximum standby current	0.036 A
Maximum slew rate	0.243 mA
Maximum supply voltage (Vsup)	1.45 V
Minimum supply voltage (Vsup)	1.283 V
Nominal supply voltage (Vsup)	1.35 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	Tin/Lead/Silver (Sn/Pb/Ag)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	9.5 mm

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8Gb: x4, x8 TwinDie DDR3L SDRAM

Description

TwinDie™ 1.35V DDR3L SDRAM

MT41K2G4 – 128 Meg x 4 x 8 Banks x 2 Ranks

MT41K1G8 – 64 Meg x 8 x 8 Banks x 2 Ranks

Description

The 8Gb (TwinDie™) DDR3L SDRAM (1.35V) uses

Micron’s 4Gb DDR3L SDRAM die (essentially two

ranks of the 4Gb DDR3L SDRAM). Refer to Micron’s

4Gb DDR3 SDRAM data sheet for the specifications

not included in this document. Specifications for base

part number MT41K1G4 correlate to TwinDie manu-

facturing part number MT41K2G4; specifications for

base part number MT41K512M8 correlate to TwinDie

manufacturing part number MT41K1G8.

Options

• Configuration

– 128 Meg x 4 x 8 banks x 2 ranks

– 64 Meg x 8 x 8 banks x 2 ranks

• FBGA package (Pb-free)

– 78-ball FBGA

(10.5mm x 12mm x 1.2mm) Die

Rev :D

– 78-ball FBGA

(9.5mm x 11.5mm x 1.2mm) Die

Rev :E

• Timing – cycle time

– 1.071ns @ CL = 13 (DDR3L-1866)

– 1.25ns @ CL = 11 (DDR3L-1600)

– 1.5ns @ CL = 9 (DDR3L-1333)

– 1.87ns @ CL = 7 (DDR3L-1066)

• Self refresh

– Standard

• Operating temperature

– Commercial (0°C

≤

95°C)

– Industrial (-40°C

≤

95°C) Rev. E

• Revision

Note:

1. CL = CAS (READ) latency.

Marking

2G4

1G8

THE

TRF

Features

• Uses 4Gb Micron die

• Two ranks (includes dual CS#, ODT, CKE, and ZQ

balls)

• Each rank has eight internal banks for concurrent

operation

• V

= V

DDQ

= 1.35V (1.283–1.45V); backward com-

patible to V

= V

DDQ

= 1.5V ±0.075V

• 1.35V center-terminated push/pull I/O

• JEDEC-standard ball-out

• Low-profile package

• T

of 0°C to 95°C

– 0°C to 85°C: 8192 refresh cycles in 64ms

– 85°C to 95°C: 8192 refresh cycles in 32ms

– Industrial temperature (IT) available (Rev. E)

Table 1: Key Timing Parameters

Speed Grade

-107

-125

-15E

-187E

None

:D/:E

Data Rate (MT/s)

1866

1600

1333

1066

Target

RCD-

RP-CL

13-13-13

11-11-11

9-9-9

7-7-7

RCD

(ns)

CL (ns)

13.91

13.75

13.5

13.1

13.91

13.75

13.5

13.1

13.91

13.75

13.5

13.1

-125

-15E

-187E

Notes:

1. Backward compatible to 1066, CL = 7 (-187E).

2. Backward compatible to 1333, CL = 9 (-15E).

3. Backward compatible to 1600, CL = 11 (-125).

PDF: 09005aef84787542

DDR3L_8Gb_x4_x8_2CS_TwinDie.pdf - Rev. F 05/13 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

MT41K1G8TRF-125:E Related Products

	MT41K1G8TRF-125:E	MT41K1G8TRF-107:E
Description	DDR DRAM, 1GX8, 0.225ns, CMOS, PBGA78, 9.50 X 11.50 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-78	DDR DRAM, 1GX8, CMOS, PBGA78, 9.50 X 11.50 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-78
Is it Rohs certified?	conform to	conform to
Maker	Micron Technology	Micron Technology
package instruction	TFBGA, BGA78,9X13,32	TFBGA,
Reach Compliance Code	compliant	compli
ECCN code	EAR99	EAR99
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
Other features	SELF REFRESH	SELF REFRESH
JESD-30 code	R-PBGA-B78	R-PBGA-B78
length	11.5 mm	11.5 mm
memory density	8589934592 bit	8589934592 bi
Memory IC Type	DDR DRAM	DDR DRAM
memory width	8	8
Number of functions	1	1
Number of ports	1	1
Number of terminals	78	78
word count	1073741824 words	1073741824 words
character code	1000000000	1000000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS
organize	1GX8	1GX8
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TFBGA	TFBGA
Package shape	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH
Maximum seat height	1.2 mm	1.2 mm
self refresh	YES	YES
Maximum supply voltage (Vsup)	1.45 V	1.45 V
Minimum supply voltage (Vsup)	1.283 V	1.283 V
Nominal supply voltage (Vsup)	1.35 V	1.35 V
surface mount	YES	YES
technology	CMOS	CMOS
Terminal form	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM
width	9.5 mm	9.5 mm

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