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EDI8F32128V12MZC

Description
SRAM Module, 128KX32, 12ns, CMOS, PZMA64, PLASTIC, ZIP-64
Categorystorage    storage   
File Size125KB,6 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

EDI8F32128V12MZC Overview

SRAM Module, 128KX32, 12ns, CMOS, PZMA64, PLASTIC, ZIP-64

EDI8F32128V12MZC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Objectid1924495320
package instructionPLASTIC, ZIP-64
Reach Compliance Codeunknown
YTEOL0
Maximum access time12 ns
JESD-30 codeR-PZMA-T64
memory density4194304 bit
Memory IC TypeSRAM MODULE
memory width32
Number of functions1
Number of terminals64
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize128KX32
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formTHROUGH-HOLE
Terminal locationZIG-ZAG
Maximum time at peak reflow temperatureNOT SPECIFIED
EDI8F32128V
128K x 32 Static RAM CMOS, High Speed Module
FEATURES
• 128K x 32 bit CMOS Static RAM
• Access Times: 10 and 12ns
• Individual Byte Selects
• Fully Static, No Clocks
• TTL Compatible I/O
• High Density Package
• JEDEC Standard Pinouts
• 64 Pad SIMM, No. 38
• 64 Pin ZIP, No. 39
• Common Data Inputs and Outputs
• Single +3.3V (±10%) Supply Operation
DESCRIPTION
The EDI8F32128V is a high speed 4 megabit Static RAM module
organized as 128K words by 32 bits. This module is constructed
from four 128K x 8 Static RAMs in SOJ packages on an epoxy
laminate (FR4) board.
Four chip enables (EØ-E3) are used to independently enable the
four bytes. Reading or writing can be executed on individual bytes
or any combination of multiple bytes through proper use of
enables.
The EDI8F32128V is offered in 64 pin ZIP and 64 Pad SIMM
packages, which enable four megabits of memory to be placed in
less than 1.3 square inches of board space.
All inputs and outputs are TTL compatible and operate from a
single 5V supply. Fully asynchronous circuitry requires no clocks
or refreshing for operation and provides equal access and cycle
times for ease of use.
Two pins, PD1 and PD2, are used to identify module memory
density in applications where alternate modules can be inter-
changed.
FIG. 1
PIN CONFIGURATIONS AND BLOCK DIAGRAM
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
VSS
PD2
DQ8
DQ9
DQ10
DQ11
A0
A1
A2
DQ12
DQ13
DQ14
DQ15
VSS
A15
E1
E3
NC
G
DQ24
DQ25
DQ26
DQ27
A3
A4
A5
VCC
A6
DQ28
DQ29
DQ30
DQ31
8F32128V Pin Conf
PIN NAMES
AØ-A16
Address Inputs
Chip Enables
Write Enable
Output Enable
Common Data Input/Output
Power (+3.3V±10%)
Ground
No Connection
EØ-E3
W
G
DQØ-DQ31
VCC
VSS
PD1
DQ0
DQ1
DQ2
DQ3
VCC
A7
A8
A9
DQ4
DQ5
DQ6
DQ7
W
A14
E0
E2
A16
VSS
DQ16
DQ17
DQ18
DQ19
A10
A11
A12
A13
DQ20
DQ21
DQ22
DQ23
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
A
0-16
W
G
17
128K x 8
8
DQ
0-7
E
0
128K x 8
8
DQ
8-15
NC
E
1
128K x 8
8
DQ
16-23
E
2
128K x 8
8
DQ
24-31
PD1 = Open
PD2 = Open
E
3
8F32128V Blk Dia
Aug, 2001 Rev. 0
ECO # 14560
1
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
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