ZGP323LAH4808G datasheet, PDF - EEWORLD Datasheet

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ZGP323LAH4808G: DescriptionMicrocontroller, 8-Bit, OTPROM, Z8 CPU, 8MHz, CMOS, PDSO48, LEAD FREE, SSOP-48; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，107 Pages; ManufacturerIXYS; Environmental Compliance

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ZGP323LAH4808G Overview

Microcontroller, 8-Bit, OTPROM, Z8 CPU, 8MHz, CMOS, PDSO48, LEAD FREE, SSOP-48

ZGP323LAH4808G Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Objectid	2030395438
Parts packaging code	SSOP
package instruction	LEAD FREE, SSOP-48
Contacts	48
Reach Compliance Code	compliant
YTEOL	0
Has ADC	NO
Address bus width
bit size	8
CPU series	Z8
maximum clock frequency	8 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	R-PDSO-G48
JESD-609 code	e3
length	15.875 mm
Humidity sensitivity level	3
Number of I/O lines	32
Number of terminals	48
On-chip program ROM width	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP48,.4
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	255
Certification status	Not Qualified
RAM (bytes)	237
rom(word)	8192
ROM programmability	OTPROM
Maximum seat height	2.79 mm
speed	8 MHz
Maximum slew rate	10 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	2 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
width	7.49 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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Z8 GP

™

Microcontrollers

ZGP323L OTP MCU Family

Product Specification

PS023709-0208

www.zilog.com

ZGP323L

Product Specification

Table of Contents

Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Development Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Pin Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

XTAL1 Crystal 1 (Time-Based Input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

XTAL2 Crystal 2 (Time-Based Output) . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Input/Output Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Port 1 (P17–P10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Port 2 (P27–P20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Port 3 (P37–P30) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

RESET (Input, Active Low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Expanded Register File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Counter/Timer Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Expanded Register File Control Registers (0D) . . . . . . . . . . . . . . . . . . . . . . 58

Expanded Register File Control Registers (0F) . . . . . . . . . . . . . . . . . . . . . . . 65

Standard Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Standard Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Customer Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

PS023709-0208

Table of Contents

ZGP323L

Product Specification

Architectural Overview

Zilog’s ZGP323L is an OTP-based member of the MCU family of infrared

microcontrollers. With 237 B of general-purpose RAM and up to 32 KB of OTP, Zilog’s

CMOS microcontrollers offer fast-executing, efficient use of memory, sophisticated

interrupts, input/output bit manipulation capabilities, automated pulse generation/

reception, and internal key-scan pull-up transistors.

The ZGP323L architecture (see

Figure 1)

is based on Zilog’s 8-bit microcontroller core

with an Expanded Register File allowing access to register-mapped peripherals, I/O

circuits, and powerful counter/timer circuitry. The Z8

offers a flexible I/O scheme, an

efficient register and address space structure, and a number of ancillary features that are

useful in many consumer, automotive, computer peripheral, and battery-operated hand-

held applications.

There are three basic address spaces available to support a wide range of configurations:

Program Memory, Register File and Expanded Register File. The register file is composed

of 256 bytes of RAM. It includes 4 I/O port registers, 16 control and status registers, and

236 general-purpose registers. The Expanded Register File consists of two additional

To unburden the program from coping with such real-time problems as generating

complex waveforms or receiving and demodulating complex waveform/pulses, the Z8 GP

OTP MCU offers a new intelligent counter/timer architecture with 8-bit and

16-bit counter/timers (see

Figure 2).

Also included are a large number of user-selectable

modes and two on-board comparators to process analog signals with separate reference

voltages.

Note:

All signals with an overline, “ ”, are active Low. For example, B/W, in which WORD is

active Low, and B/W, in which BYTE is active Low.

Power connections use the conventional descriptions listed in

Table 1.

Table 1. Power Connections

Connection

Power

Ground

Circuit

GND

Device

PS023709-0208

Architectural Overview

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