EEWORLDEEWORLDEEWORLD

Part Number

Search

510DBB-CAAG

Description
osc prog 3.3V hcsl 25ppm 5x7mm
CategoryPassive components   
File Size1MB,26 Pages
ManufacturerSilicon
Environmental Compliance  
Download Datasheet View All

510DBB-CAAG Overview

osc prog 3.3V hcsl 25ppm 5x7mm

S i 5 1 0 / 5 11
C
R YS TA L
O
SCILLATOR
(XO) 100 kH
Z
Features
TO
250 MH
Z
Supports any frequency from
100 kHz to 250 MHz
Low jitter operation
2 to 4 week lead times
Total stability includes 10-year
aging
Comprehensive production test
coverage includes crystal ESR and
DLD
On-chip LDO regulator for power
supply noise filtering
3.3, 2.5, or 1.8 V operation
Differential (LVPECL, LVDS,
HCSL) or CMOS output options
Optional integrated 1:2 CMOS
fanout buffer
Runt suppression on OE and
power on
Industry standard 5 x 7 and
3.2 x 5 mm packages
Pb-free, RoHS compliant
–40
to 85
o
C operation
Si5602
Applications
SONET/SDH/OTN
Gigabit Ethernet
Fibre Channel/SAS/SATA
PCI Express
Ordering Information:
See page 14.
3G-SDI/HD-SDI/SDI
Telecom
Switches/routers
FPGA/ASIC clock generation
Pin Assignments:
See page 12.
Description
The Si510/511 XO utilizes Silicon Laboratories' advanced DSPLL technology
to provide any frequency from 100 kHz to 250 MHz. Unlike a traditional XO
where a different crystal is required for each output frequency, the Si510/511
uses one fixed crystal and Silicon Labs’ proprietary DSPLL synthesizer to
generate any frequency across this range. This IC-based approach allows
the crystal resonator to provide enhanced reliability, improved mechanical
robustness, and excellent stability. In addition, this solution provides superior
supply noise rejection, simplifying low jitter clock generation in noisy
environments. Crystal ESR and DLD are individually production-tested to
guarantee performance and enhance reliability. The Si510/511 is factory-
configurable for a wide variety of user specifications, including frequency,
supply voltage, output format, output enable polarity, and stability. Specific
configurations are factory-programmed at time of shipment, eliminating long
lead times and non-recurring engineering charges associated with custom
frequency oscillators.
OE
1
4
V
DD
GND
2
3
CLK
Si510 (CMOS)
NC
OE
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Functional Block Diagram
V
DD
OE
Si510(LVDS/LVPECL/HCSL/
Dual CMOS)
OE
OE
1
1
2
2
3
3
6
6
5
5
4
4
V
DD
V
DD
CLK–
CLK–
CLK+
CLK+
Low Noise Regulator
Fixed
Frequency
Oscillator
Any-Frequency
0.1 to 250 MHz
DSPLL
®
Synthesis
CLK+
CLK–
NC
NC
GND
GND
GND
Si511(LVDS/LVPECL/HCSL/
Dual CMOS)
Rev. 1.2 7/15
Copyright © 2015 by Silicon Laboratories
Si510/511
【Atmel SAM R21】Get in the car!!! Let’s go!!!
[i=s]This post was last edited by ddllxxrr on 2015-3-9 09:31[/i] I remember thatwas the first movie Huang Bo made when he debuted, and I still have a deep impression of it. It was about a young man wh...
ddllxxrr Microchip MCU
AD PCB How to copy room according to angle
AD PCB designs an LED flat light ring (with outer radius and inner radius). Through board-level design, it uses 6 rooms with an angle of 60 degrees to design. How to copy the room so that the componen...
wuyong0806 PCB Design
An urgent-urgent-earnest question?
Why did I post but my points didn't show up? I saw something good but I can't download it because I don't have points. Can the administrator organize a lottery so I can get some points to download som...
kangkang8881 MCU
RISC-V MCU Development (XI): Cross-core Engineering Conversion
Most embedded engineers use Keil for development, but Keil currently does not support RISC-V cores, only ARM cores. MounRiver Studio (MRS) supports both cores. In order to facilitate engineers to migr...
Moiiiiilter MCU
Designing a Waveform Generator Using a Microcontroller
This design adopts Lingyang 61A (16-bit microcontroller with built-in DA output). This design can change the output frequency (10Hz-10K) and select the waveform....
sliujian MCU
FPGA signal recovery
If I want to use FPGA to restore the two signals below to the above ones, what do you think? This is the signal in the video stream 24 for RGB...
3008202060 FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2836  1440  1988  2647  337  58  29  41  54  7 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号