8N4Q001KG-0160CDI8 datasheet, PDF

Datasheet> All Categories > semiconductor> Analog mixed-signal IC> 8N4Q001KG-0160CDI8

8N4Q001KG-0160CDI8: DescriptionIC osc clock QD freq 10clcc; Categorysemiconductor Analog mixed-signal IC; File Size163KB，20 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

Download Datasheet View All

8N4Q001KG-0160CDI8 Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	8N4Q001KG-0160CDI8	-	-	View	Buy Now

8N4Q001KG-0160CDI8 Overview

IC osc clock QD freq 10clcc

Preview

Download Datasheet

View All

Quad-Frequency Programmable XO IDT8N4Q001 REV G

DATA SHEET

General Description

The IDT8N4Q001 is a Quad-Frequency Programmable Clock

Oscillator with very flexible frequency programming capabilities. The

device uses IDT’s fourth generation FemtoClock® NG technology for

an optimum high clock frequency and low phase noise performance.

The device accepts 2.5V or 3.3V supply and is packaged in a small,

lead-free (RoHS 6) 10-lead ceramic 5mm x 7mm x 1.55mm package.

Besides the four default power-up frequencies set by the FSEL0 and

FSEL1 pins, the IDT8N4Q001 can be programmed via the I

interface to output clock frequencies between 15.476MHz to

866.67MHz and from 975MHz to 1,300MHz to a very high degree of

precision with a frequency step size of 435.9Hz ÷

(N is the PLL

output divider). Since the FSEL0 and FSEL1 pins are mapped to four

independent PLL divider registers (P, MINT, MFRAC and N),

reprogramming those registers to other frequencies under control of

FSEL0 and FSEL1 is supported. The extended temperature range

supports wireless infrastructure, telecommunication and networking

end equipment requirements.

Features

•

Fourth generation FemtoClock® NG technology

Programmable clock output frequency from 15.476MHz to

866.67MHz and from 975MHz to 1,300MHz

Four power-up default frequencies (see part number order

codes), re-programmable by I

C programming interface for the output clock frequency and

internal PLL control registers

Frequency programming resolution is 435.9Hz ÷N

One 2.5V, 3.3V LVDS clock output

Two control inputs for the power-up default frequency

LVCMOS/LVTTL compatible control inputs

RMS phase jitter @ 156.25MHz (12kHz - 20MHz): 0.253ps

(typical), integer PLL feedback configuration

RMS phase jitter @ 156.25MHz (1kHz - 40MHz): 0.263ps

(typical), integer PLL feedback configuration

Full 2.5V or 3.3V supply modes

-40°C to 85°C ambient operating temperature

Available in Lead-free (RoHS 6) package

Block Diagram

OSC

XTAL

÷MINT,

MFRAC

FSEL1

FSEL0

SCLK

SDATA

Pulldown

Pullup

Pin Assignment

÷P

PFD

LPF

FemtoClock® NG

VCO

1950-2600MHz

÷N

Q

DNU 1

OE 2

GND 3

FSEL0 4

FSEL1 5

10 SCLK

9 SDATA

8 V

7 nQ

6 Q

Configuration Register (ROM)

(Frequency, APR, Polarity)

C Control

IDT8N4Q001

10-lead ceramic 5mm x 7mm x 1.55mm

package body

CD Package

Top View

IDT8N4Q001GCD

REVISION A

MARCH 6, 2012

Recommended Resources

Design of data transmission interface circuit for a car driving recorder

Internal structure block diagram of CD4541

Interface circuit between power supply coupler and digital circuit

Output negative regulated power supply circuit diagram using op amp 5G23

Three-phase power meter wiring method

Computer motherboard circuit diagram 830_24

It’s not fun anymore. The delivery time of 4G modules is about 4-6 weeks.: [i=s]This post was last edited by qwqwqw2088 on 2022-3-16 16:52[/i]It's not fun anymore. The supplier just called and said that the delivery time of 4G modules is about 4-6 weeks, and they have to be ...; qwqwqw2088 RF/Wirelessly

Summary of mobile phone leak methods and anti-leakage measures: At present, mobile phones have become one of the necessities of modern life. The privacy of mobile phones makes the information on users' mobile phones closely related to their own interests. Once a m...; azhiking Integrated technical exchanges

Character encoding problem in C# serial port programming: I receive data in the code like this: string str = comm.ReadExisting(); After receiving it, the content in str is: "AT+CMGL=\"UREAD\"+CMGL: 0,\"REC UNREAD\",\"13581640170\",0,4\0.NY??\0J\0d\0g\0+CMGL:...; suizhihen Embedded System

EVC's question about drawing a check mark before a menu option: I write under evc3.0 IDR_EDITMENU MENU DISCARDABLE BEGIN MENUITEM "Dictionary", ID_DIC POPUP "メニュー" BEGIN POPUP "Settings" BEGIN POPUP "SIZE" BEGIN MENUITEM "Large", ID_BIG MENUITEM "Medium", ID_MID M...; 52voip Embedded System

Problems with the F28377D sample SOC_EPWM: AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1 This sentence should be that the interrupt pulse is generated one cycle before the ADC result is latched into the result register EPwm1Regs.ETPS.bit.SOCAPRD = 1 1 ...; datong Microcontroller MCU

Has anyone bought the Renesas R7F0C80212 MCU? Can you give me the contact information?: [size=4]I think this thing is good. I want to get 300 of them to play with. Does anyone know how to contact me? I think the advertisement says it costs 1 yuan per piece? [/size]:pleased:...; youki12345 Renesas Electronics MCUs

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components