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74LCX00MTCX

Description
LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PDSO14
Categorylogic    logic   
File Size84KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74LCX00MTCX Overview

LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PDSO14

74LCX00MTCX Parametric

Parameter NameAttribute value
Brand NameFairchild Semiconduc
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP14,.25
Contacts14
Manufacturer packaging code14 LD,TSSOP,JEDEC MO-153, 4.4MM WIDE
Reach Compliance Codecompli
ECCN codeEAR99
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G14
JESD-609 codee4
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeNAND GATE
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Prop。Delay @ Nom-Su5.2 ns
propagation delay (tpd)6.2 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
Base Number Matches1
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
March 1995
Revised March 1999
74LCX00
Low Voltage Quad 2-Input NAND Gate with 5V Tolerant
Inputs
General Description
The LCX00 contains four 2-input NAND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
The 74LCX00 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs
s
2.3V–3.6V V
CC
specifications provided
s
5.2 ns t
PD
max (V
CC
=
3.3V), 10
µA
I
CC
max
s
Power down high impedance inputs and outputs
s
±24
mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Order Number
74LCX00M
74LCX00SJ
74LCX00MTC
Package Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
Description
Inputs
Outputs
© 1999 Fairchild Semiconductor Corporation
DS012408.prf
www.fairchildsemi.com

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