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74VHCT138ASJX

Description
decoder/demux 3-TO-8 16sop
Categorylogic    logic   
File Size347KB,9 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74VHCT138ASJX Overview

decoder/demux 3-TO-8 16sop

74VHCT138ASJX Parametric

Parameter NameAttribute value
Brand NameFairchild Semiconductor
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOP
package instruction5.30 MM, EIAJ TYPE2, SOP-16
Contacts16
Manufacturer packaging code16LD,SOP,EIAJ TYPE II, 5.3MM WIDE
Reach Compliance Codecompliant
ECCN codeEAR99
Other features3 ENABLE INPUTS
seriesAHCT/VHCT
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G16
JESD-609 codee3
length10.1 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeOTHER DECODER/DRIVER
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of functions1
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityINVERTED
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Prop。Delay @ Nom-Sup13 ns
propagation delay (tpd)13 ns
Certification statusNot Qualified
Maximum seat height2.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width5.3 mm
Base Number Matches1
74VHCT138A 3-to-8 Decoder/Demultiplexer
May 2007
74VHCT138A
3-to-8 Decoder/Demultiplexer
Features
High Speed: t
PD
=
7.6ns (Typ.) at V
CC
=
5V
Low power dissipation: I
CC
=
4µA (Max.) at T
A
=
25°C
Power down protection is provided on all inputs and
tm
General Description
The VHCT138A is an advanced high speed CMOS
3-to-8 DECODER fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar
to equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
When the device is enabled, 3 Binary Select inputs
(A
0
, A
1
and A
2
) determine which one of the outputs
(O
0
–O
7
) will go LOW. When enable input E
3
is held
LOW or either E
1
or E
2
is held HIGH, decoding function
is inhibited and all outputs go HIGH. E
3
, E
1
and E
2
inputs
are provided to ease cascade connection and for use as
an address decoder for memory systems. Protection
circuits ensure that 0V to 7V can be applied to the input
pins without regard to the supply voltage and to the out-
put pins with V
CC
=
0V. These circuits prevent device
destruction due to mismatched supply and input/output
voltages. This device can be used to interface 3V to 5V
systems and two supply systems such as battery
backup.
outputs
Pin and function compatible with 74HCT138
Ordering Information
Order Number
74VHCT138AM
74VHCT138ASJ
74VHCT138AMTC
Package
Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
©1993 Fairchild Semiconductor Corporation
74VHCT138A Rev. 1.2
www.fairchildsemi.com

74VHCT138ASJX Related Products

74VHCT138ASJX 74VHCT138AMX
Description decoder/demux 3-TO-8 16sop decoder/demux 3-TO-8 16soic
Brand Name Fairchild Semiconductor Fairchild Semiconduc
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker Fairchild Fairchild
Parts packaging code SOP SOIC
package instruction 5.30 MM, EIAJ TYPE2, SOP-16 0.150 INCH, MS-012AC, SOIC-16
Contacts 16 16
Manufacturer packaging code 16LD,SOP,EIAJ TYPE II, 5.3MM WIDE 16LD,SOIC,JEDEC MS-012,.150\" ,NARROW BODY
Reach Compliance Code compliant compli
ECCN code EAR99 EAR99
Other features 3 ENABLE INPUTS 3 ENABLE INPUTS
series AHCT/VHCT AHCT/VHCT
Input adjustment STANDARD STANDARD
JESD-30 code R-PDSO-G16 R-PDSO-G16
JESD-609 code e3 e3
length 10.1 mm 9.9 mm
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type OTHER DECODER/DRIVER OTHER DECODER/DRIVER
MaximumI(ol) 0.008 A 0.008 A
Humidity sensitivity level 1 1
Number of functions 1 1
Number of terminals 16 16
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output polarity INVERTED INVERTED
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP
Encapsulate equivalent code SOP16,.3 SOP16,.25
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
method of packing TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260
power supply 5 V 5 V
propagation delay (tpd) 13 ns 13 ns
Certification status Not Qualified Not Qualified
Maximum seat height 2.1 mm 1.75 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn)
Terminal form GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED 30
width 5.3 mm 3.9 mm
Base Number Matches 1 1

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