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3D7503D-25

Description
Manchester Encoder/Decoder, CMOS, PDSO14, 0.150 INCH, SOIC-14
CategoryWireless rf/communication    Telecom circuit   
File Size47KB,5 Pages
ManufacturerData Delay Devices
Download Datasheet Parametric View All

3D7503D-25 Overview

Manchester Encoder/Decoder, CMOS, PDSO14, 0.150 INCH, SOIC-14

3D7503D-25 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerData Delay Devices
Parts packaging codeSOIC
package instructionSOP,
Contacts14
Reach Compliance Codecompliant
JESD-30 codeR-PDSO-G14
length8.695 mm
Number of functions1
Number of terminals14
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.75 mm
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Telecom integrated circuit typesMANCHESTER ENCODER/DECODER
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
Base Number Matches1
3D7503
MONOLITHIC MANCHESTER
ENCODER/DECODER
(SERIES 3D7503)
FEATURES
All-silicon, low-power CMOS technology
Encoder and decoder function independently
Encoder has buffered clock output
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Maximum data rate:
50 MBaud
Data rate range:
±15%
Lock-in time:
1 bit
CIN
CEN
RX
COUT
DIN
RESB
GND
data
3
®
delay
devices,
inc.
PACKAGES
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VDD
CBUF
LOOP
TXENB
DOUTB
TXB
TX
3D7503-xxx
DIP (.300)
3D7503G-xxx Gull Wing (.300)
3D7503D-xxx SOIC (.150)
FUNCTIONAL DESCRIPTION
The 3D7503 is a monolithic CMOS Manchester Encoder/Decoder combo
chip. The device uses bi-phase-level encoding to embed a clock signal
into a data stream for transmission across a communications link. In this
encoding mode, a logic one is represented by a high-to-low transition in
the center of the bit cell, while a logic zero is represented by a low-to-high
transition.
The Manchester encoder combines the clock (CIN) and data (DIN) into a
single bi-phase-level signal (TX). An inverted version of this signal (TXB)
is also available. The data baud rate (in MBaud) is equal to the input
clock frequency (in MHz). A replica of the clock input is also available
(CBUF).
PIN DESCRIPTIONS
Encoder:
CIN
Clock Input
DIN
Data Input
RESB Reset
CEN
Clock buffer enable
TXENB Transmit enable
CBUF Buffered clock
TX,TXB Transmitted signal
Decoder:
RX
Received Signal
COUT Recovered Clock
DOUTB Recovered Data
The encoder may be reset by setting the RESB input low; otherwise, it
Common:
should be left high. The TX and TXB signals may be disabled (high-Z) by
LOOP Loop enable
setting TXENB high. Similarly, CBUF may be disabled by setting CEN
VDD
+5 Volts
low. Under most operating conditions, the encoder is never reset, TX and GND
Ground
TXB are always enabled, and CBUF is not used. With this in mind, the
3D7503 provides an internal pull-up resistor on RESB and internal pull-
down resistors on CEN and TXENB, so that most users can leave these inputs uncommitted.
The Manchester decoder accepts the embedded-clock signal at the RX input. The recovered clock and
data signals are presented on COUT and DOUTB, respectively, with the data signal inverted. The
operating baud rate (in MBaud) is specified by the dash number of the device. The input baud rate may
vary by as much as
±15%
from the nominal device baud rate without compromising the integrity of the
information received.
Because the decoder is not PLL-based, it does not require a long preamble in order to lock onto the
received signal. Rather, the device requires at most one bit cell before the data presented at the output is
valid. This is extremely useful in cases where the information arrives in bursts and the input is otherwise
turned off.
Normally, the encoder and decoder function independently. However, if the LOOP input is set high, the
encoded TX signal is fed back internally into the decoder and the RX input is ignored. This feature is
useful for diagnostics. The LOOP input has an internal pull-down resistor and may be left uncommitted if
this feature is not needed.
©
1998 Data Delay Devices
Doc #98009
12/11/98
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
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