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Datasheet> All Categories > storage> storage> LY62W1024PN-55LL
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LY62W1024PN-55LL

Description
Standard SRAM, 128KX8, 55ns, CMOS, PDIP32,
Categorystorage    storage   
File Size262KB，15 Pages
ManufacturerLyontek
Websitehttp://www.lyontek.com.tw/index.html
Download Datasheet Parametric View All

LY62W1024PN-55LL Overview

Standard SRAM, 128KX8, 55ns, CMOS, PDIP32,

LY62W1024PN-55LL Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Objectid107224519
package instructionDIP, DIP32,.6
Reach Compliance Codecompliant
ECCN codeEAR99
YTEOL0
Maximum access time55 ns
I/O typeCOMMON
JESD-30 codeR-PDIP-T32
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize128KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP32,.6
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum standby current0.000012 A
Minimum standby current1.5 V
Maximum slew rate0.06 mA
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL

LY62W1024PN-55LL Preview

®
LY62W1024
Rev. 1.3
128K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 1.3
Description
Initial Issue
Revised I
SB1
LL/LLI-LLE(max)= 50/100
μA
=> 20/50
μA
I
DR
LL/LLI-LLE(max)= 20/40
μA
=> 12/30
μA
Added SL Spec.
Revised typos in
FEATURES
Issue Date
Aug.28.2005
Mar.30.2006
Nov.2.2007
May.6.2008
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
0
®
LY62W1024
Rev. 1.3
128K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The LY62W1024 is a 1,048,576-bit low power
CMOS static random access memory organized as
131,072 words by 8 bits. It is fabricated using very
high performance, high reliability CMOS technology.
Its standby current is stable within the range of
operating temperature.
The LY62W1024 is well designed for very low power
system applications, and particularly well suited for
battery back-up nonvolatile memory application.
The LY62W1024 operates from a single power
supply of 2.7V ~ 5.5V and all inputs and outputs are
fully TTL compatible
FEATURES
Fast access time : 35/55/70ns
Low power consumption:
Operating current : 12/10/7mA (TYP.)
Standby current : 1μA (TYP.)
Single 2.7V ~ 5.5V power supply
All outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 1.5V (MIN.)
Lead free and green package available
Package : 32-pin 450 mil SOP
32-pin 600 mil P-DIP
32-pin 8mm x 20mm TSOP-I
32-pin 8mm x 13.4mm STSOP
36-ball 6mm x 8mm TFBGA
PRODUCT FAMILY
Product Family
LY62W1024
LY62W1024(E)
LY62W1024(I)
Operating Temperature
0 ~ 70℃
-20 ~ 80℃
-40 ~ 85℃
Vcc Range
2.7 ~ 5.5V
2.7 ~ 5.5V
2.7 ~ 5.5V
Speed
35/55/70ns
35/55/70ns
35/55/70ns
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
Vcc
Vss
A0 - A16
DQ0 – DQ7
DECODER
128Kx8
MEMORY ARRAY
CE#, CE2
WE#
OE#
V
CC
V
SS
NC
A0-A16
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
CE2
WE#
OE#
CONTROL
CIRCUIT
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
1
®
LY62W1024
Rev. 1.3
128K X 8 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SOP/P-DIP
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
CE2
WE#
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
A11
A9
A8
A13
WE#
CE2
A15
Vcc
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
Vss
DQ2
DQ1
DQ0
A0
A1
A2
A3
LY62W1024
LY62W1024
TSOP-I/STSOP
A
B
C
D
E
F
G
H
A0
DQ4
DQ5
Vss
Vcc
DQ6
A1
A2
CE2
WE#
NC
A3
A4
A5
A6
A7
A8
DQ0
DQ1
Vcc
Vss
NC
NC
DQ2
A15 DQ3
A13
A14
DQ7 OE# CE# A16
A9
A10
A11
A12
1
2
3
4
TFBGA
5
6
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Terminal Voltage with Respect to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
Soldering Temperature (under 10 sec)
SYMBOL
V
TERM
T
A
T
STG
P
D
I
OUT
T
SOLDER
RATING
-0.5 to 7.0
0 to 70(C grade)
-20 to 80(E grade)
-40 to 85(I grade)
-65 to 150
1
50
260
UNIT
V
℃
℃
W
mA
℃
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2
®
LY62W1024
Rev. 1.3
128K X 8 BIT LOW POWER CMOS SRAM
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE#
H
X
L
L
L
CE2
X
L
H
H
H
OE#
X
X
H
L
X
WE#
X
X
H
H
L
I/O OPERATION
High-Z
High-Z
High-Z
D
OUT
D
IN
SUPPLY CURRENT
I
SB1
I
SB1
I
CC
,I
CC1
I
CC
,I
CC1
I
CC
,I
CC1
H = V
IH
, L = V
IL
, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
SYMBOL
TEST CONDITION
MIN.
PARAMETER
Supply Voltage
V
CC
2.7
*1
Input High Voltage
V
IH
0.7*Vcc
*2
Input Low Voltage
V
IL
- 0.2
V
CC
≧
V
IN
≧
V
SS
Input Leakage Current
I
LI
-1
Output Leakage
V
CC
≧
V
OUT
≧
V
SS,
I
LO
-1
Current
Output Disabled
Output High Voltage
V
OH
I
OH
= -1mA
2.2
Output Low Voltage
V
OL
I
OL
= 2mA
-
- 35
-
Cycle time = Min.
CE# = V
IL
and CE2 = V
IH
, - 55
I
CC
-
I
I/O
= 0mA
- 70
-
Average Operating
Cycle time = 1µs
Power supply Current
CE#
≦
0.2V and CE2
≧
V
CC
-0.2V,
I
CC1
-
I
I/O
= 0mA
other pins at 0.2V or V
CC
-0.2V
-SL
CE#
≧
V
CC
-0.2V
-
or CE2
≦
0.2V
-SLE/-SLI
-
Standby Power
I
SB1
Other pins at 0.2V
Supply Current
-LL
-
or Vcc-0.2V
-LLE/-LLI
-
Notes:
1. V
IH
(max) = V
CC
+ 3.0V for pulse width less than 10ns.
2. V
IL
(min) = V
SS
- 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.) and T
A
= 25℃
TYP.
3.0
-
-
-
-
2.7
-
12
10
7
1
1
1
1
1
*4
MAX.
5.5
V
CC
+0.3
0.6
1
1
-
0.4
80
60
50
10
10
10
20
50
UNIT
V
V
V
µA
µA
V
V
mA
mA
mA
mA
µA
µA
µA
µA
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
3
®
LY62W1024
Rev. 1.3
128K X 8 BIT LOW POWER CMOS SRAM
CAPACITANCE
(T
A
= 25
℃
, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to V
CC
- 0.2V
3ns
1.5V
C
L
= 50pF + 1TTL, I
OH
/I
OL
= -1mA/2mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
SYM. LY62W1024-35 LY62W1024-55 LY62W1024-70 UNIT
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
t
RC
35
-
55
-
70
-
ns
t
AA
-
35
-
55
-
70
ns
t
ACE
-
35
-
55
-
70
ns
t
OE
-
25
-
30
-
35
ns
t
CLZ
*
10
-
10
-
10
-
ns
t
OLZ
*
5
-
5
-
5
-
ns
t
CHZ
*
-
15
-
20
-
25
ns
t
OHZ
*
-
15
-
20
-
25
ns
t
OH
10
-
10
-
10
-
ns
SYM. LY62W1024-35 LY62W1024-55 LY62W1024-70
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
t
WC
35
-
55
-
70
-
t
AW
30
-
50
-
60
-
t
CW
30
-
50
-
60
-
t
AS
0
-
0
-
0
-
t
WP
25
-
45
-
55
-
t
WR
0
-
0
-
0
-
t
DW
20
-
25
-
30
-
t
DH
0
-
0
-
0
-
t
OW
*
5
-
5
-
5
-
t
WHZ
*
-
15
-
20
-
25
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*These parameters are guaranteed by device characterization, but not production tested.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
4
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