EEWORLDEEWORLDEEWORLD

Part Number

Search

B32330I5355J081

Description
CAPACITOR, FILM/FOIL, POLYPROPYLENE, 3.5uF, CHASSIS MOUNT, CAN, ROHS COMPLIANT
CategoryPassive components    capacitor   
File Size2MB,16 Pages
ManufacturerTDK Corporation
Websitehttp://www.tdk.com
Environmental Compliance  
Download Datasheet Parametric View All

B32330I5355J081 Overview

CAPACITOR, FILM/FOIL, POLYPROPYLENE, 3.5uF, CHASSIS MOUNT, CAN, ROHS COMPLIANT

B32330I5355J081 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Objectid1725369218
package instruction,
Reach Compliance Codecompliant
ECCN codeEAR99
YTEOL2
capacitance3.5 µF
Capacitor typeFILM CAPACITOR
dielectric materialsPOLYPROPYLENE
JESD-609 codee3
Installation featuresCHASSIS MOUNT
negative tolerance5%
Number of terminals2
Maximum operating temperature70 °C
Minimum operating temperature-25 °C
Package shapeCYLINDRICAL PACKAGE
positive tolerance5%
Rated (AC) voltage (URac)420 V
surface mountNO
Terminal surfaceMatte Tin (Sn)
Terminal shapeLUG
Product Profile 2011
MotorCap P2 Aluminum Can
AC Film Capacitors for Motor Run Applications
www.epcos.com
[Transfer] Issues that should be paid attention to when using MSP430
I thought it was pretty good, so I copied it.Original link: http://www.deyisupport.com/question_answer/f/55/t/1289.aspx#31611.#include means to include it in the editor setting directory, #include"" m...
wstt Microcontroller MCU
High score solution to the problem of Linux input method
High score solution to the problem of Linux input method http://community.eeworld.net/Expert/TopicView3.asp?id=5341375...
songguoda Linux and Android
[Urgent] I would like to ask a question that seems to be about 485.
My engineering application: (computer)--(board-wireless module) (wireless module)---(board 1)--(board 2).... The host computer is connected to a 232-to-485 board, and a wireless module bought in Shenz...
linliuh Embedded System
FPGA various digital circuit simulation.rar
FPGA various digital circuit simulation.rar...
zxopenljx FPGA/CPLD
An expert's PCB design experience
[font=微软雅黑][size=4]General[/size][/font][color=rgb(66,152,186)][font=微软雅黑][size=4]The basic design process of PCB[/size][/font][/color][font=微软雅黑][size=4]is as follows: Preliminary preparation->PCB st...
ohahaha PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2020  2497  207  1232  538  41  51  5  25  11 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号