EEWORLDEEWORLDEEWORLD

Part Number

Search

D38999/26JH55SNL

Description
MIL Series Connector, 55 Contact(s), Composite, Female, Crimp Terminal, Plug,
CategoryThe connector    The connector   
File Size10MB,122 Pages
ManufacturerEsterline Technologies Corporation
Download Datasheet Parametric View All

D38999/26JH55SNL Overview

MIL Series Connector, 55 Contact(s), Composite, Female, Crimp Terminal, Plug,

D38999/26JH55SNL Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerEsterline Technologies Corporation
Reach Compliance Codeunknown
ECCN codeEAR99
Other featuresSTANDARD: MIL-DTL-38999, POLARIZED, RFI SHIELDED, COMPATIBLE CONTACT: M39029/56351
Back shell typeSOLID
Body/casing typePLUG
Connector typeMIL SERIES CONNECTOR
Contact to complete cooperationNOT SPECIFIED
Contact point genderFEMALE
Contact materialNOT SPECIFIED
Number of contacts55
Contact size20
Coupling typeTHREADED
DIN complianceNO
empty shellYES
Environmental characteristicsFLUID RESISTANT
Filter functionNO
IEC complianceNO
MIL complianceYES
Plug informationMULTIPLE MATING PARTS AVAILABLE
Mixed contactsNO
Installation typeCABLE
Maximum operating temperature175 °C
Minimum operating temperature-65 °C
OptionsGENERAL PURPOSE
polarizationN
Shell surfaceCADMIUM PLATED
Shell materialCOMPOSITE
Housing sizeH
Termination typeSOLDER
Total number of contacts55
Unique insertion numberH55
Base Number Matches1
8D Series
MIL-DTL-38999 Series III
EEWORLD University - Object Detection and Recognition Using Neural Networks
Object Detection and Recognition Using Neural Networks : https://training.eeworld.com.cn/course/2044Object Detection and Recognition Using Neural Networks...
chenyy FPGA/CPLD
ARM7 dynamic memory allocation problem
I use the LPC2138 chip and the development software is ADS. The program is as follows: int main(void) { uint8 flag = 0; sys = (SYS_TYPE *) malloc(sizeof(SYS_TYPE)); //Allocate dynamic memory space if(...
tyutlx ARM Technology
Cadence about flash pads
I am learning Cadence software recently. When I was learning to draw DIP package, I saw that I needed to draw the flash pad. I don’t quite understand it. I would like to ask a few naive questions and ...
feng134335 PCB Design
Why does the length of the waveform displayed by the logic analyzer become longer?
[color=#000][font=微软雅黑,]How can the length of the waveform displayed by the logic analyzer become longer? Is this related to the sampling depth? It cannot be greater than the sampling depth? [/font][/...
通通 FPGA/CPLD
Makefile sister term verilog
When using systermverilog for simulation, how to write vcs instructions in Makefile?...
xianw FPGA/CPLD
ADC0809 A/D converter basic application technology
[b]Basic knowledge[/b] ADC0809 is a CMOS component with an 8-bit A/D converter, an 8-way multiplexer, and microprocessor-compatible control logic. It is a successive approximation A/D converter that c...
呱呱 DIY/Open Source Hardware

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 795  297  2076  2111  2835  16  6  42  43  58 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号