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PA28F200B5T60

Description
512K X 8 FLASH 5V PROM, 80 ns, PDSO48
Categorystorage    storage   
File Size488KB,38 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
Download Datasheet Parametric View All

PA28F200B5T60 Overview

512K X 8 FLASH 5V PROM, 80 ns, PDSO48

PA28F200B5T60 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeSOIC
package instruction0.525 X 1.110 INCH, PLASTIC, SOP-44
Contacts44
Reach Compliance Codeunknow
ECCN codeEAR99
Maximum access time70 ns
Other featuresCONFG AS 128K X 16; USER SELECTABLE AS 5V OR 12V VPP; TOP BOOT BLOCK
Spare memory width8
startup blockTOP
command user interfaceYES
Data pollingNO
JESD-30 codeR-PDSO-G44
JESD-609 codee0
length28.2 mm
memory density2097152 bi
Memory IC TypeFLASH
memory width8
Number of functions1
Number of departments/size1,2,1,1
Number of terminals44
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP44,.63
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programming voltage5 V
Certification statusNot Qualified
Maximum seat height2.95 mm
Department size16K,8K,96K,128K
Maximum standby current0.000008 A
Maximum slew rate0.07 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
switch bitNO
typeNOR TYPE
width13.3 mm
Base Number Matches1
E
n
n
n
n
n
ADVANCE INFORMATION
SMART 5 BOOT BLOCK
FLASH MEMORY FAMILY
2, 4, 8 MBIT
28F200B5, 28F400B5, 28F800B5, 28F004B5
SmartVoltage Technology
Smart 5 Flash: 5 V Reads,
5 V or 12 V Writes
Increased Programming Throughput
at 12 V V
PP
Very High-Performance Read
2-, 4-Mbit: 60 ns Access Time
8-Mbit: 70 ns Access Time
x8 or x8/x16-Configurable Data Bus
Low Power Consumption
Max 60 mA Read Current at 5 V
Auto Power Savings: <1 mA Typical
Standby Current
Optimized Array Blocking Architecture
16-KB Protected Boot Block
Two 8-KB Parameter Blocks
96-KB and 128-KB Main Blocks
Top or Bottom Boot Locations
Extended Temperature Operation
–40 °C to +85 °C
Industry-Standard Packaging
40, 48-Lead TSOP, 44-Lead PSOP
n
n
Extended Block Erase Cycling
100,000 Cycles at Commercial Temp
10,000 Cycles at Extended Temp
Hardware Data Protection Feature
Absolute Hardware-Protection for
Boot Block
Write Lockout during Power
Transitions
Automated Word/Byte Program and
Block Erase
Command User Interface
Status Registers
Erase Suspend Capability
SRAM-Compatible Write Interface
Reset/Deep Power-Down Input
Provides Low-Power Mode and
Reset for Boot Operations
Pinout Compatible 2, 4, and 8 Mbit
ETOX™ Flash Technology
0.6
µ
ETOX IV Initial Production
0.4
µ
ETOX V Later Production
n
n
n
n
n
n
n
Intel’s Smart 5 boot block flash memory family provides 2-, 4-, and 8-Mbit memories featuring high-density,
low-cost, nonvolatile, read/write storage solutions for a wide range of applications. Their asymmetrically-
blocked architecture, flexible voltage, and extended cycling provide highly flexible components suitable for
embedded code execution applications, such as networking infrastructure and office automation.
Based on Intel’s boot block architecture, the Smart 5 boot block memory family enables quick and easy
upgrades for designs that demand state-of-the-art technology. This family of products comes in industry-
standard packages: the 40-lead TSOP for very space-constrained 8-bit applications, 48-lead TSOP, ideal for
board-constrained higher-performance 16-bit applications, and the rugged, easy to handle 44-lead PSOP.
December 1997
Order Number: 290599-004
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