INTEGRATED CIRCUITS
83C576/87C576
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D,
4 comparators, failure detect circuitry, watchdog timer
Product specification
Supersedes data of 1998 Jan 06
IC20 Data Handbook
1998 Jun 04
Philips
Semiconductors
Philips Semiconductors
Product specification
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators,
failure detect circuitry, watchdog timer
83C576/87C576
FEATURES
•
80C51 based architecture
–
8k
×
8 ROM (83C576)
–
256
×
8 RAM
–
10-bit, 6 channel A/D
–
Three 16-bit counter/timers
–
2 PWM outputs
–
Programmable Counter Array
–
Universal Peripheral Interface
–
Enhanced UART
–
Oscillator fail detect
–
Low active reset
–
4 analog comparators
–
Watchdog timer
–
Low V
CC
detect
–
Power-on detect
–
8k
×
8 EPROM (87C576)
•
OTP available
•
That can be programmed in circuit
•
Software Reset
•
15 source, 2 level interrupt structure
•
Lower EMI noise
•
Programmable I/O pins
•
Serial on-board programming
•
Schmitt trigger inputs on Port 1
DESCRIPTION
The Philips 83C576/87C576 is a high-performance microcontroller
fabricated with Philips high-density CMOS technology. The Philips
CMOS technology combines the high speed and density
characteristics of HMOS with the low power attributes of CMOS.
Philips epitaxial substrate minimizes latch-up sensitivity.
The 8XC576 contains an 8k
×
8 ROM (83C576) EPROM (87C576),
a 256
×
8 RAM, 32 I/O lines, three 16-bit counter/timers, a
Programmable Counter Array (PCA), a 10-bit, 6 channel A/D,
2 PWM outputs, an 8-bit UPI interface, a fifteen-source, two-priority
level nested interrupt structure, an enhanced UART, four analog
comparators, power-fail detect and oscillator fail detect circuits, and
on-chip oscillator and clock circuits.
In addition, the 8XC576 has a low active reset, and a software reset.
There is also a fully configurable watchdog timer, and internal power
on clear circuit. The part includes idle mode and power-down mode
states for reduced power consumption.
•
Memory addressing capability
–
64k ROM and 64k RAM
•
Power control modes:
–
Idle mode
–
Power-down mode
•
CMOS and TTL compatible
•
6 to 16MHz
•
Extended temperature ranges
ORDERING INFORMATION
ROM
P83C576EBP N
P83C576EBA A
P83C576EBB B
P83C576EFP N
P83C576EFA A
P83C576EFB B
P83C576EHPN
P83C576EHAA
P83C576EHBB
EPROM
1
P87C576EBPN
P87C576EBAA
P87C576EBBB
P87C576EBPN
P87C576EFA A
P87C576EFBB
P87C576EHPN
P87C576EHAA
P87C576EHBB
OTP
OTP
OTP
OTP
OTP
OTP
OTP
OTP
OTP
TEMPERATURE RANGE
°C
AND PACKAGE
0 to +70, 40-Pin Plastic Dual In-line Package
0 to +70, 44-Pin Plastic Leaded Chip Carrier
0 to +70, 44-Pin Plastic Quad Flat Pack
–40 to +85, 40-Pin Plastic Dual In-line Package
–40 to +85, 44-Pin Plastic Leaded Chip Carrier
–40 to +85, 44-Pin Plastic Quad Flat Pack
–40 to +125, 40-Pin Plastic Dual In-line Package
–40 to +125, 44-Pin Plastic Leaded Chip Carrier
–40 to +125, 44-Pin Plastic Quad Flat Pack
FREQ
(MHz)
16
16
16
16
16
16
16
16
16
DRAWING
NUMBER
SOT129-1
SOT187-2
SOT307-2
SOT129-1
SOT187-2
SOT307-2
SOT129-1
SOT187-2
SOT307-2
NOTE:
1. OTP - One Time Programmable EPROM.
1998 Jun 04
2
853-2067 19495
Philips Semiconductors
Product specification
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators,
failure detect circuitry, watchdog timer
83C576/87C576
BLOCK DIAGRAM
P0.0-P0.7
P2.0-P2.7
UPI
CONTROL
PORT 0
DRIVERS
PORT 2
DRIVERS
V
CC
LOW
VOLTAGE
DETECT
V
SS
POWER
ON
DETECT
A
RAM ADDR
REGISTER
B
RAM
PORT 0
LATCH
PORT 2
LATCH
ROM/
EPROM
B
REGISTER
ACC
STACK
POINTER
PROGRAM
ADDRESS
REGISTER
TMP2
TMP1
BUFFER
ALU
WATCHDOG
TIMER
B
A
PSEN
ALE
EA
RST
PD
TIMING
AND
CONTROL
INSTRUCTION
REGISTER
PSW
SFRs
TIMERS
PCA
PC
INCRE-
MENTER
PROGRAM
COUNTER
DPTR
CLK AND OSC
FAILURE
DETECT
PORT 1
LATCH
10-BIT
ANALOG TO DIGITAL
CONVERTER
PORT 1
DRIVERS
PORT 3
LATCH
PWM
OSCILLATOR
PORT 3
DRIVERS
COMPARATOR
BLOCK
XTAL1
XTAL2
+AV
CC
P3.0-P3.7
P1.0-P1.5
–AV
SS
SU00255B
1998 Jun 04
3
Philips Semiconductors
Product specification
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators,
failure detect circuitry, watchdog timer
83C576/87C576
LOGIC SYMBOL
V
CC
XTAL1
PORT 0
ADDRESS AND
DATA BUS
V
SS
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
XTAL2
SECONDARY FUNCTIONS
RST
EA/V
PP
PSEN
SECONDARY FUNCTIONS
ALE/PROG
RxD
TxD
INT0
INT1
T0
T1
WR
RD
CMP3+
CMP2+
CMP1+
CMPR–
CMP0+
CMP0–
ADDRESS BUS
ADIN0
ADIN1
ADIN2
ADIN3
ADIN4
ADIN5
PWM1/ECI
CEX4/PWM0
T2/CS#
T2EX/A0
CEX3/CMP3
CEX2/CMP2
CEX1/CMP1
CEX0/CMP0
PORT 3
PORT 2
PORT 1
SU00254A
PIN CONFIGURATIONS
44-pin Plastic Quad Flat Pack
44
34
7
1
33
LCC
PQFP
17
Plastic Leaded Chip Carrier
6
1
40
39
11
23
29
18
12
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Function
ADIN3/P1.3
ADIN4/P1.4
ADIN5/P1.5
RST
RxD/P3.0
NC*
TXD/P3.1
INT0/P3.2/CMP3+
INT1/P3.3/CMP2+
T0/P3.4/CMP1+
T1/P3.5/CMPR–
WR/P3.6/CMP0+
RD/P3.7CMP0–
XTAL2
XTAL1
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
22
Function
V
SS
NC*
P2.0/A8/CEX0/CMP0
P2.1/A9/CEX1/CMP1
P2.2/A10/CEX2/CMP2
P2.3/A11/CEX3/CMP3
P2.4/A12/T2EX/A0
P2.5/A13/T2/CS
P2.6/A14/CEX4/PWM0
P2.7/A15/PWM1/ECI
PSEN
ALE/PROG
NC*
EA/V
PP
P0.7/AD7/DB7
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
P0.6/AD6/DB6
P0.5/AD5/DB5
P0.4/AD4/DB4
P0.3/AD3/DB3
P0.2/AD2/DB2
P0.1/AD1/DB1
P0.0/AD0/DB0
V
CC
NC*
+V
REF
/AV
CC
–V
REF
/AV
SS
ADIN0/P1.0
ADIN1/P1.1
ADIN2/P1.2
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Function
NC*
+V
REF
/AV
CC
–V
REF
/AV
SS
ADIN0/P1.0
ADIN1/P1.1
ADIN2/P1.2
ADIN3/P1.3
ADIN4/P1.4
ADIN5/P1.5
RST
RxD/P3.0
NC*
TxD/P3.1
INT0/P3.2/CMP3+
INT1/P3.3/CMP2+
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Function
T0/P3.4/CMP1+
T1/P3.5/CMPR–
WR/P3.6/CMP0+
RD/P3.7/CMP0–
XTAL2
XTAL1
V
SS
28
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
P2.7/A15/PWM1/ECI
PSEN
ALE/PROG
NC*
EA/V
PP
P0.7/AD7/DB7
P0.6/AD6/DB6
P0.5/AD5/DB5
P0.4/AD4/DB4
P0.3/AD3/DB3
P0.2/AD2/DB2
P0.1/AD1/DB1
P0.0/AD0/DB0
V
CC
NC*
P2.0/A8/CEX0/CMP0
P2.1/A9/CEX1/CMP1
P2.2/A10/CEX2/CMP2
P2.3/A11/CEX3/CMP3
P2.4/A12/T2EX/A0
P2.5/A13/T2/CS
P2.6/A14/CEX4/PWM0
* NO INTERNAL CONNECTION
* NO INTERNAL CONNECTION
SU00252A
SU00253B
1998 Jun 04
4
Philips Semiconductors
Product specification
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators,
failure detect circuitry, watchdog timer
83C576/87C576
PIN DESCRIPTIONS
PIN NUMBER
MNEMONIC
DIP
20
40
39-32
LCC
22
44
43-36
QFP
16
38
37-30
TYPE
I
I
I/O
NAME AND FUNCTION
Ground:
0V reference.
Power Supply:
This is the power supply voltage for normal, idle, and power-down operation.
Port 0:
Port 0 is a bidirectional I/O port. Port 0 is also the multiplexed low-order address and
data bus during accesses to external program and data memory (see Note 5). In this
application, it uses strong internal pull-ups when emitting 1s. Port 0 also receives code bytes
during parallel EPROM programming and outputs code bytes during verification. External
pull-ups are required during program verification. During reset, the port register is loaded
with 1’s. Port 0 has 4 output modes selected on a per bit basis by writing to the P0M1 and
P0M2 Special Function Registers as follows:
P0M1.x
P0M2.x
Mode Description
0
0
Open drain (default). See Note 1.
0
1
Weak pullup. See Note 2.
1
0
High impedance. See Note 3.
1
1
Push-pull. See Note 4.
Port 0 is also the data I/O port for the Universal Peripheral Interface (UPI). When the UPI is
enabled, port 0 must be configured as High-Z by the user. Input/Output through P0 is
controlled by pin CS, WR, RD, and A0. Output is push-pull when enabled.
Port 1:
Port 1 is a 6-bit bidirectional I/O port with Schmitt trigger inputs. Port 1 receives the control
signals during program memory verification and parallel EPROM programming. During reset, port
1 is configured as a high impedance analog input port. Digital push-pull outputs are enabled by
writing 1’s to the P1M1 register. The programmer must take care to prevent digital outputs from
switching while an A/D conversion is in progress. Port 1 has 3 output modes selected on a per bit
basis by writing to the P1M1 and P1M2 special function registers as follows:
P1M1.X
P1M2.X
Mode Description
0
0
A/D only. (High impedance)
0
1
Digital input only. High impedance (default).
1
X
Push-pull.
Port 1 pins also serve alternate functions as follows:
P1.0/ADIN0
P1.1/ADIN1
P1.2/ADIN2
P1.3/ADIN3
P1.4/ADIN4
P1.5/ADIN5
Port 2:
Port 2 is an 8-bit bidirectional I/O port. Port 2 emits the high-order address byte
during accesses to external program and data memory that use 16-bit addresses (MOVX
@DPTR) (see Note 5). In this application, it uses strong internal pull-ups when emitting 1s.
Port 2 receives the high-order address byte during program verification and parallel EPROM
programming. During reset, the port 2 pullups are turned on synchronously, and the port
register is loaded with 1’s. Port 2 has the following output modes which can be selected on a
per bit basis by writing to P2M1 and P2M0:
P2M1.X
P2M2.X
Mode Description
0
0
Open drain. See Note 1.
0
1
Weak pullup (default). See Note 2.
1
0
High impedance. See Note 3.
1
1
Push-pull. See Note 4.
Port 2 pins serve alternate functions as follows:
P2.0
CEX0
PCA module 0 external I/O
CMP0
comparator 0 output
P2.1
CEX1
PCA module 1 external I/O
CMP1
comparator 1 output
P2.2
CEX2
PCA module 2 external I/O
CMP2
comparator 2 output
P2.3
CEX3
PCA module 3 external I/O
CMP3
comparator 3 output
P2.4
T2EX
timer 2 capture input
A0
UPI address input
P2.5
T2
timer 2 external I/O — clock-out (programmable)
CS
UPI chip select input
P2.6
CEX4
PCA module 4 external I/O
PWM0
Pulse width modulator 0 output
P2.7
ECI
PCA count input
PWM1
Pulse width modulator 1 output
V
SS
V
CC
P0.0-0.7
P1.0-P1.5
3-8
5-9
42-44
1-3
I/O
3
4
5
6
7
8
P2.0-P2.7
21-28
4
5
6
7
8
9
24-31
42
43
44
1
2
3
18-25
I/O
I/O
I/O
I/O
I/O
I/O
I/O
21
22
23
24
25
26
27
28
24
25
26
27
28
29
30
31
18
19
20
21
22
23
24
25
1998 Jun 04
5
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