Philips Semiconductors
Product specification
80C51 Ultra Low Power (ULP) telephony controller
CONTENTS
1
2
3
4
5
5.1
5.2
6
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
7
7.1
8
8.1
8.2
8.3
FEATURES
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING INFORMATION
Pin configuration
Pin description
FUNCTIONAL DESCRIPTION
Oscillator circuitry
The CPU
Interrupt controller
Port control logic
Timer 0 and Timer 1 event counters
Timer 2
Watchdog Timer
I
2
C-bus serial I/O (master/slave interface)
MSK modem
Internal Data Memory
Special Function Registers overview
INSTRUCTION SET
Instruction map
APPLICATION INFORMATION
Introduction
Differences between P83CL882 and the
Metalink EH emulation system
The asynchronous handshake CPU
9
9.1
9.2
9.3
10
11
12
13
13.1
13.2
13.3
13.4
13.5
14
15
16
17
P83CL882
HOW TO ESTIMATE P83CL882 POWER
CONSUMPTION
General
Modes
Examples of power consumption estimation
LIMITING VALUES
CHARACTERISTICS
PACKAGE OUTLINE
SOLDERING
Introduction to soldering surface mount
packages
Reflow soldering
Wave soldering
Manual soldering
Suitability of surface mount IC packages for
wave and reflow soldering methods
DATA SHEET STATUS
DEFINITIONS
DISCLAIMERS
PURCHASE OF PHILIPS I
2
C COMPONENTS
2001 Jun 19
2
Philips Semiconductors
Product specification
80C51 Ultra Low Power (ULP) telephony controller
1
FEATURES
P83CL882
•
Full static asynchronous handshake 80C51 CPU;
enhanced 8-bit architecture with:
– Standard 80C51 instruction set
– CPU speed independent of clock frequency, average
speed: 4.8 Mips at 3.0 V
– Non-page oriented instructions
– Direct addressing
– Four 8-byte RAM register banks
– Stack depth limited only by available internal RAM
(maximum 128 bytes)
– Multiply, divide, subtract and compare instructions.
•
17 source, 17 vector interrupt structure with two priority
levels, polarity and sensitivity choice
•
24 general purpose I/O pins
•
Timer 0 and 1: two standard 16-bit timer/event counters
•
Timer 2: 16-bit timer/event counter with capture,
compare and auto-reload function
•
Watchdog Timer
•
Wake-up counter
•
Idle and Power-down modes
•
4-kbyte ROM: mask programmed read only memory
•
Supply voltage: 1.8 to 3.6 V
•
128 bytes RAM
•
Internal crystal oscillator
•
Reset I/O pin for external reset from master or to slave
•
MSK modem including Manchester encoder/decoder
with 2 digital outputs (by SW) for analog cordless
telephones (standards CT0/CT1/CT1+)
•
I
2
C-bus master/slave (transmitter/receiver, maximum
frequency 400 kHz).
2
GENERAL DESCRIPTION
The P83CL882 is manufactured in an advanced CMOS
technology. The P83CL882 is a member of the VTELX
family of low-power, low-voltage 80CL51 microcontrollers
with advanced features for telecom applications. The
Philips exclusive, asynchronous handshaking technology
has been used for the CPU implementation which makes
the CPU to run at its maximum speed independent of the
used crystal frequency.
The P83CL882 is especially suited for low cost analog
cordless telephone applications (CT0, CT1 and CT1+
standards) and wired feature phones. For this purpose,
functions like MSK modem and I
2
C-bus are integrated
on-chip.
The device is optimized for low-power consumption. It has
two software selectable modes for power reduction: Idle
and Power-down. In addition, the clock to all unused
peripheral blocks can be switched off.
The instruction set is based on that of the 80C51. The
P83CL882 also functions as an arithmetic processor
having facilities for both binary and BCD arithmetic plus
bit-handling capabilities. The instruction set consists of
over 100 instructions: 49 one-byte, 46 two-byte, and
16 three-byte. Port 2 is not incorporated, therefore there is
no external data or memory access and the MOVX
operations cannot be used.
3
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
P83CL882T/xxx
TSSOP32
DESCRIPTION
plastic thin shrink small outline package; 32 leads;
body width 6.1 mm
VERSION
SOT487-1
2001 Jun 19
3
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