Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
CONTENTS
1
2
3
4
5
6
7
7.1
7.2
8
8.1
8.2
9
9.1
9.2
9.3
9.4
10
10.1
10.2
10.3
10.4
11
11.1
11.2
11.3
12
12.1
12.2
12.3
12.4
12.5
13
13.1
13.2
13.3
13.4
FEATURES
GENERAL DESCRIPTION
APPLICATIONS
ORDERING INFORMATION
BLOCK DIAGRAM
FUNCTIONAL DIAGRAM
PINNING INFORMATION
Pinning
Pin description
FUNCTIONAL DESCRIPTION OVERVIEW
General
CPU timing
MEMORY ORGANIZATION
Program memory
Data memory
Special Function Registers
Addressing
I/O FACILITIES
Ports
Port options
Port 0 options
SET/RESET options
TIMER/EVENT COUNTERS
Timer 0 and Timer 1
Timer T2
Timer/Counter 2 Control Register (T2CON)
REDUCED POWER MODES
Idle mode
Power-down mode
Wake-up from Power-down mode
Status of external pins
Power Control Register (PCON)
I
2
C-BUS SERIAL I/O
Serial Control Register (S1CON)
Serial Status Register (S1STA)
Data Shift Register (S1DAT)
Address Register (S1ADR)
14.3
15
15.1
15.2
15.3
16
17
17.1
17.2
18
19
20
21
22
22.1
22.2
23
24
24.1
24.2
24.3
25
26
27
14
14.1
14.2
P83CL781; P83CL782
STANDARD SERIAL INTERFACE SIO0: UART
Multiprocessor communications
Serial Port Control and Status Register
(S0CON)
Baud rates
INTERRUPT SYSTEM
External interrupts INT2 to INT9
Interrupt priority
Interrupt registers
OSCILLATOR CIRCUITRY
RESET
External reset using the RST pin
Power-on reset
SPECIAL FUNCTION REGISTERS
OVERVIEW
INSTRUCTION SET
LIMITING VALUES
DC CHARACTERISTICS
AC CHARACTERISTICS
Program memory
External Data Memory
PACKAGE OUTLINES
SOLDERING
Introduction
DIP
QFP
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I
2
C COMPONENTS
1997 Mar 14
2
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
1
FEATURES
2
P83CL781; P83CL782
GENERAL DESCRIPTION
•
Full static 80C51 CPU
•
8-bit CPU, ROM, RAM, I/O in a 40-lead DIP or 44-lead
QFP package
•
16 kbytes ROM, expandable externally to 64 kbytes
•
256 bytes RAM, expandable externally to 64 kbytes
•
Four 8-bit ports, 32 I/O lines
•
Three 16-bit timer/event counters
•
External memory expandable up to 128 kbytes: RAM up
to 64 kbytes and ROM up to 64 kbytes
•
On-chip oscillator suitable for RC, LC, quartz crystal or
ceramic resonator
•
Fifteen source, fifteen vector interrupt structure with two
priority levels
•
Full duplex serial port (UART)
•
I
2
C-bus interface for serial transfer on two lines
•
Enhanced architecture with:
– non-page oriented instructions
– direct addressing
– four 8 byte RAM register banks
– stack depth limited only by available internal RAM
(maximum 256 bytes)
– multiply, divide, subtract and compare instructions
•
Reduced power consumption through Power-down and
Idle modes
•
Wake-up via external interrupts at Port 1
•
Single supply voltage of 1.8 to 6.0 V
•
Operating ambient temperature:
– 83CL781:
−40
to +85
°C
– 83CL782:
−25
to +55
°C.
•
Frequency range of DC to 12 MHz
•
Very low current consumption.
The term P83CL78x is used throughout this data sheet to
refer to both the P83CL781 and P83CL782; differences
between the devices are highlighted in the text.
The P83CL78x is manufactured in an advanced CMOS
technology. The P83CL78x has the same instruction set
as the 80C51, consisting of over 100 instructions:
49 one-byte, 46 two-byte, and 16 three-byte. The device
has low power consumption and a wide range of supply
voltage; there are two software-selectable modes of
reduced activity for further power reduction: Idle and
Power-down. For emulation purposes, the P85CL781
(piggy-back version) with 256 bytes of RAM is
recommended.
The P83CL782 is a faster version of the P83CL781 and
operates at a maximum frequency of 12 MHz at
V
DD
≥
3.1 V.
This data sheet details the specific properties of the
P83CL78x. For details of the 80C51 core and the I
2
C-bus
see
“Data Handbook IC20”.
3
APPLICATIONS
The P83CL78x is an 8-bit general purpose microcontroller
especially suited for cordless telephone applications.
The P83CL78x also functions as an arithmetic processor
having facilities for both binary and BCD arithmetic plus
bit-handling capabilities.
1997 Mar 14
3
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