QUICK START GUIDE
FOR DC1589A
LTC4425EDD: Linear Supercap
Charger With Current-Limited
Ideal Diode And V/I Monitor
DESCRIPTION
Demonstration Circuit DC1589A is a Linear Supercap Charger with Current-Limited Ideal Diode and V/I Monitor,
featuring the LTC
®
4425.
PERFORMANCE SUMMARY
Specifications are at T
A
= 25°C
SYMBOL
Vin
Icharge
VOUT
V(MID)
PARAMETER
Input Voltage Range
Supercap Charge current
Supercap Stack Output Voltage
Supercap Midpoint Voltage
CONDITIONS
MIN
2.7
1.2
0.6
TYP
MAX
5.5
2
5.4
2.7
UNITS
V
A
V
V
QUICK START PROCEDURE
Refer to Figure 1 for the proper measurement
equipment setup and jumper settings and follow the
procedure below.
NOTE.
When measuring the input or output voltage ripple, care
must be taken to avoid a long ground lead on the oscilloscope
probe. Measure the input or output voltage ripple by touching the
probe tip directly across the VBUS or VOUT(x) and GND terminals.
See Figure 2 for proper scope probe technique.
1. Set b[2-0] jmpers (JP3, JP4, JP5) to “1”. Set
MODE (JP6) to “LDO”. Set LD1 to 0A, and PS1
to 5V. Observe VOUT (VM3) = 3.3V, I(VIN)
(AM1) = 2A, and V(PROG) (VM2) = 1V. Note:
The supercapacitor COUT1 will charge in ap-
proximately 0.5 seconds, so please observe
these signals within a few seconds of setting
PS1 to 5V.
2. Set PS1 to 0V. Observe D1 (PFO) should be lit
due to input ‘power failure’
3. Set LD1 to 1A. Observe VOUT. VOUT should
decrease to 0V, in about 1 second.
1
LTC4425EDD
-
VM2
AM1
+
+
-
+
+
VM3
AM2
-
+
-
LD1
0V - 5V
2A
+
PS1
1A
+
VM1
-
4.35V - 5.5V supply
-
-
Note: All connections from equipment should be Kelvin connected directly to the board
pins which they are connected on this diagram and any input or output leads should be
twisted pair.
Figure 1. Proper Measurement Equipment Setup for DC1550A
Figure 2. Measuring Input or Output Ripple
VIN
GND
2
E1
VIN
D1
1
VIN
PFO LED
OFF
ON
JP7
D2
2
1
2
2.7V - 5.5V
C1
2.2uF
6.3V
20%
PFO
BAT54C
E9
+
E2
R1
1.5MEG
U1
LTC4425EDD
11 12
VINVIN
PFI
VOUT
VOUT
1
2
PFO
8
9
GND
R13
1k
5%
R2
1.2MEG
C2
OPT
V+
7
PFI_RET
+
4
SEL
EN
6
VMID
10
E3
R3
10k
5%
C3
OPT
VIN
GND
13
FB
5
COUT1
0.55F
HS206F
5.5V
VOUT
R14
0V to 4.9V / 5.4V
511
5%
OPT
E8
GND
E7
VMID
SEL
C4
10uF
0603
OPT
EN
3
PROG
E4
R5
E5
10k
5%
PROG
VCLAMP VIN
5.4V
4.9V
JP2
1
0
JP4
JP5
0
1
1
R6
1MEG
0
5%
JP3
b2
b0
b1
R7
1k
R8
2.49k
R9
2k
R10
10k
EN
VIN
MODE
Normal
LDO
JP6
R11
1.2MEG
ENABLE
R12
2.1MEG
DISABLE
JP1
E6
Figure 3. Circuit Schematic
Unless Noted: All Resistors are 0402, 1%, 1/16W
All Capacitors are 0402, 10%
*
GND
R4
1MEG
5%
Charge current = 1000 / R prog
b2 b1 b0 Charge current
0
0
0
100mA
CUSTOMER NOTICE
CONTRACT NO.
APPROVALS
DRAWN:
CHECKED:
0
0
1
600mA
0
1
0
500mA
G. Barbehenn
APPROVED:
ENGINEER:
TECHNOLOGY
TITLE: SCHEMATIC
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
0
1
1
1000mA
1
0
0
1100mA
1
0
1
1600mA
LTC4425EDD: LINEAR SUPERCAP CHARGER WITH
CURRENT-LIMITED IDEAL DIODE AND V/I MONITOR
DESIGNER:
1
1
0
1500mA
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
G. Barbehenn
SIZE
DWG NO.
REV
A
DATE:
LTC4425EDD
1
1
*
Default
1
2000mA
DC1589A
Monday, November 23, 2009
A
SHEET
1
OF 1
3
FPGA/CPLD
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